公开(公告)号：US20150235823A1

公开(公告)日：2015-08-20

申请号：US14183670

申请日：2014-02-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chien CHI ,  Shing-Chyang PAN ,  Kuan-Chia CHEN ,  Yao-Jen CHANG ,  Huang-Yi HUANG ,  Ching-Hua HSIEH

IPC: H01J37/34 ,  C23C14/35 ,  C23C14/50 ,  H01L21/285 ,  C23C14/24 ,  C23C14/54

CPC classification number: C23C14/35 ,  C23C14/3492 ,  C23C14/542 ,  H01J37/3405 ,  H01J37/3452 ,  H01J37/3455 ,  H01J37/3458

Abstract: Embodiments of a plasma apparatus are provided. The plasma apparatus includes a processing chamber and a wafer chuck disposed in the processing chamber. The plasma apparatus also includes a target element located over the wafer chuck and an electromagnet array located over the target element and having a number of electromagnets. Some of the electromagnets in a magnetic-field zone of the electromagnet array are enabled to generate a magnetic field adjacent to the target element. The magnetic-field zone is moved during a semiconductor manufacturing process.

Abstract translation: 提供了等离子体装置的实施例。 等离子体装置包括设置在处理室中的处理室和晶片卡盘。 等离子体装置还包括位于晶片卡盘上方的目标元件和位于目标元件上方并具有多个电磁体的电磁体阵列。 电磁体阵列的磁场区域中的一些电磁体能够产生与目标元件相邻的磁场。 磁场区在半导体制造过程中移动。

公开(公告)号：US20250066899A1

公开(公告)日：2025-02-27

申请号：US18454702

申请日：2023-08-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yen LIAO ,  I. LEE ,  Shu-Lan CHANG ,  Sheng-Hsuan LIN ,  Feng-Yu CHANG ,  Wei-Jung LIN ,  Chun-I TSAI ,  Chih-Chien CHI ,  Ming-Hsing TSAI ,  Pei Shan CHANG ,  Chih-Wei CHANG

IPC: C23C14/04 ,  C23C14/34 ,  C23C14/50 ,  C23C14/54 ,  C23C14/58

Abstract: A method includes: positioning a wafer on an electrostatic chuck of a physical vapor deposition apparatus, the wafer including an opening exposing a conductive feature; setting a temperature of the wafer to a room temperature; forming a tungsten thin film in the opening by the physical vapor deposition apparatus, the tungsten thin film including a bottom portion that is on an upper surface of the conductive feature exposed by the opening, a top portion that is on an upper surface of a dielectric layer through which the opening extends and a sidewall portion that is on a sidewall of the dielectric layer exposed by the opening; removing the top portion and the sidewall portion of the tungsten thin film from over the opening; and forming a tungsten plug in the opening on the bottom portion by selectively depositing tungsten by a chemical vapor deposition operation.

公开(公告)号：US20190164826A1

公开(公告)日：2019-05-30

申请号：US15964430

申请日：2018-04-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jung-Tang WU ,  Pao-Sheng CHEN ,  Pei-Hsuan LEE ,  Szu-Hua WU ,  Chih-Chien CHI

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/67

Abstract: In a method for manufacturing a semiconductor device, a substrate is provided. Various first metal layers are formed on the substrate. A dielectric structure with through holes is formed over the first metal layers. The through holes expose the first metal layers. A pre-clean operation is performed on the dielectric structure and the first metal layers by using an alcohol base vapor and/or an aldehyde base vapor as a reduction agent. Conductors are formed on the first metal layers. In forming the conductors, the through holes are filled with the conductors.

公开(公告)号：US20160240357A1

公开(公告)日：2016-08-18

申请号：US14622397

申请日：2015-02-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Chien CHI ,  Hung-Wen SU ,  Pei-Hsuan LEE

IPC: H01J37/34 ,  C23C14/35 ,  C23C14/34

CPC classification number: H01J37/3447 ,  C23C14/046 ,  C23C14/35 ,  H01J37/3402

Abstract: A physical vapor deposition system includes a chamber, a cover plate, a pedestal, and a collimator. The cover plate is disposed on the chamber for holding a target. The pedestal is disposed in the chamber for supporting a wafer. The collimator is mounted between the cover plate and the pedestal. The collimator includes a plurality of sidewall sheets together forming a plurality of passages. At least one of the passages has an entrance and an exit opposite to the entrance. The entrance faces the cover plate, and the exit faces the pedestal. A thickness of one of the sidewall sheets at the entrance is thinner than a thickness of the sidewall sheet at the exit.

Abstract translation: 物理气相沉积系统包括腔室，盖板，基座和准直器。 盖板设置在用于保持目标的室上。 基座设置在用于支撑晶片的腔室中。 准直器安装在盖板和基座之间。 准直器包括一起形成多个通道的多个侧壁片。 至少一个通道具有入口对面的入口和出口。 入口面向盖板，出口面向基座。 入口处的侧壁片之一的厚度比出口处侧壁片的厚度薄。

公开(公告)号：US20190164751A1

公开(公告)日：2019-05-30

申请号：US15880389

申请日：2018-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chien CHI ,  Hsiao-Kuan WEI ,  Hung-Wen SU ,  Pei-Hsuan LEE ,  Hsin-Yun HSU ,  Jui-Fen CHIEN

IPC: H01L21/02 ,  H01L21/28 ,  H01L27/092 ,  H01L21/20 ,  H01L21/324 ,  H01L29/423 ,  H01L29/49 ,  H01L21/762 ,  H01L29/66

Abstract: Embodiments disclosed herein relate generally to capping processes and structures formed thereby. In an embodiment, a conductive feature, formed in a dielectric layer, has a metallic surface, and the dielectric layer has a dielectric surface. The dielectric surface is modified to be hydrophobic by performing a surface modification treatment. After modifying the dielectric surface, a capping layer is formed on the metallic surface by performing a selective deposition process. In another embodiment, a surface of a gate structure is exposed through a dielectric layer. A capping layer is formed on the surface of the gate structure by performing a selective deposition process.

公开(公告)号：US20160204060A1

公开(公告)日：2016-07-14

申请号：US15077761

申请日：2016-03-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Chien CHI ,  Chung-Chi KO ,  Mei-Ling CHEN ,  Huang-Yi HUANG ,  Szu-Ping TUNG ,  Ching-Hua HSIEH

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/528 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76868 ,  H01L21/76876 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53261 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A self-aligned repairing process for a barrier layer is provided. A repair layer is formed by chemical vapor deposition using an organometallic compound as a precursor gas. The precursor gas adsorbed on a dielectric layer exposed by defects in a barrier layer is transformed to an insulating metal oxide layer, and the precursor gas adsorbed on the barrier layer is transformed to a metal layer.

公开(公告)号：US20150206840A1

公开(公告)日：2015-07-23

申请号：US14161959

申请日：2014-01-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Chi-Feng LIN ,  Chih-Chien CHI ,  Ching-Hua HSIEH

IPC: H01L23/538 ,  H01L21/768

CPC classification number: H01L23/538 ,  H01L21/7684 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53228 ,  H01L23/53242 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments of mechanisms for forming a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure further includes a dielectric layer on the semiconductor substrate. The semiconductor device structure also includes at least one conductive structure embedded in the dielectric layer. A plurality of crystal grains are composed of the conductive structure, and a ratio of an average grain size of the crystal grains to a width of the conductive structure ranges from about 0.75 to about 40.

Abstract translation: 提供了用于形成半导体器件结构的机构的实施例。 半导体器件结构包括半导体衬底。 半导体器件结构还包括在半导体衬底上的电介质层。 半导体器件结构还包括嵌入电介质层中的至少一个导电结构。 多个晶粒由导电结构构成，并且晶粒的平均晶粒尺寸与导电结构的宽度的比率为约0.75至约40。