公开(公告)号：US20210202399A1

公开(公告)日：2021-07-01

申请号：US16945595

申请日：2020-07-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cheng-Wei CHANG ,  Chia-Hung CHU ,  Kao-Feng LIN ,  Hsu-Kai CHANG ,  Shuen-Shin LIANG ,  Sung-Li WANG ,  Yi-Ying LIU ,  Po-Nan YEH ,  Yu Shih WANG ,  U-Ting CHIU ,  Chun-Neng LIN ,  Ming-Hsi YEH

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768

Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.

公开(公告)号：US20220140107A1

公开(公告)日：2022-05-05

申请号：US17648166

申请日：2022-01-17

Applicant: Taiwan Semiconductor Manufacturing Co.,Ltd.

Inventor： Jian-Jou Lian ,  Chun-Neng LIN ,  Ming-Hsi YEH ,  Chieh-Wei CHEN ,  Tzu-Ang CHIANG

IPC: H01L29/66 ,  H01L21/84 ,  H01L29/78

Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.

公开(公告)号：US20190393327A1

公开(公告)日：2019-12-26

申请号：US16015521

申请日：2018-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Neng LIN ,  Shian-Wei MAO

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/306 ,  H01L21/311

Abstract: A method of forming a semiconductor device structure is provided. The method includes forming a fin structure protruding from a substrate and forming a first liner layer to cover a top surface and a sidewall of the fin structure. The first liner layer is patterned by performing a wet etching process, so as to remain a portion of the first liner layer that covers the top surface of the fin structure and a portion of the sidewall of the fin structure. The remained portion of the first liner layer is used as an etch mask to remove a portion of the fin structure from the sidewall of the fin structure, so as to form a lateral recess in the fin structure.