公开(公告)号：US09070687B2

公开(公告)日：2015-06-30

申请号：US13930161

申请日：2013-06-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Chung Lai ,  Kang-Min Kuo ,  Yen-Ming Peng ,  Gwo-Chyuan Kuoh ,  Han-Wei Yang ,  Yi-Ruei Lin ,  Chin-Chia Chang ,  Ying-Chieh Liao ,  Che-Chia Hsu ,  Bor-Zen Tien

IPC: H01L23/52 ,  H01L23/525 ,  H01L21/306

CPC classification number: H01L23/5256 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/306 ,  H01L21/32136 ,  H01L21/563 ,  H01L21/76202 ,  H01L21/76224 ,  H01L23/3171 ,  H01L29/0649 ,  H01L29/167 ,  H01L29/66477 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device with the metal fuse is provided. The metal fuse connects an electronic component (e.g., a transistor) and a existing dummy feature which is grounded. The protection of the metal fuse can be designed to start at the beginning of the metallization formation processes. The grounded dummy feature provides a path for the plasma charging to the ground during the entire back end of the line process. The metal fuse is a process level protection as opposed to the diode, which is a circuit level protection. As a process level protection, the metal fuse protects subsequently-formed circuitry. In addition, no additional active area is required for the metal fuse in the chip other than internal dummy patterns that are already implemented.

Abstract translation: 提供具有金属保险丝的半导体器件。 金属熔断器连接电子部件（例如，晶体管）和接地的现有虚拟特征。 金属保险丝的保护可以设计为在金属化形成工艺开始时开始。 接地的虚拟特征提供了在线路过程的整个后端期间等离子体对地面充电的路径。 金属保险丝是与二极管相反的过程电平保护，这是电路级保护。 作为工艺级保护，金属保险丝保护随后形成的电路。 此外，除了已经实现的内部虚拟图案之外，芯片中的金属熔断器不需要额外的有源区域。

公开(公告)号：US20150048507A1

公开(公告)日：2015-02-19

申请号：US13965294

申请日：2013-08-13

Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.

Inventor： Chin-Chia Chang ,  Han-Wei Yang ,  Chen-Chung Lai ,  Kang-Min Kuo ,  Bor-Zen Tien

IPC: H01L23/532 ,  H01L21/265

CPC classification number: H01L21/265 ,  H01L21/26513 ,  H01L21/76286 ,  H01L21/823814 ,  H01L27/0629 ,  H01L27/1463 ,  H01L29/6659 ,  H01L29/7833

Abstract: An integrated circuit includes a p-type region formed beneath a surface of a semiconductor substrate, and an n-type region formed beneath the surface of the semiconductor substrate. The n-type region meets the p-type region at a p-n junction. A diffusion barrier structure, which is beneath the surface of the semiconductor substrate and extends along a side of the p-n junction, limits lateral diffusion between the p-type region and n-type region.

Abstract translation: 集成电路包括形成在半导体衬底的表面下方的p型区域和形成在半导体衬底的表面下方的n型区域。 n型区域在p-n结处与p型区域相遇。 在半导体衬底的表面下方并且沿着p-n结的一侧延伸的扩散阻挡结构限制了p型区域和n型区域之间的横向扩散。

公开(公告)号：US10014251B2

公开(公告)日：2018-07-03

申请号：US15062063

申请日：2016-03-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chen-Chung Lai ,  Kang-Min Kuo ,  Yen-Ming Peng ,  Gwo-Chyuan Kuoh ,  Han-Wei Yang ,  Yi-Ruei Lin ,  Chin-Chia Chang ,  Ying-Chieh Liao ,  Che-Chia Hsu ,  Bor-Zen Tien

IPC: H01L23/525 ,  H01L21/306 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/762 ,  H01L29/06 ,  H01L29/167 ,  H01L21/56 ,  H01L23/31 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L23/5256 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/306 ,  H01L21/32136 ,  H01L21/563 ,  H01L21/76202 ,  H01L21/76224 ,  H01L23/3171 ,  H01L29/0649 ,  H01L29/167 ,  H01L29/66477 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device with the metal fuse is provided. The metal fuse connects an electronic component (e.g., a transistor) and a existing dummy feature which is grounded. The protection of the metal fuse can be designed to start at the beginning of the metallization formation processes. The grounded dummy feature provides a path for the plasma charging to the ground during the entire back end of the line process. The metal fuse is a process level protection as opposed to the diode, which is a circuit level protection. As a process level protection, the metal fuse protects subsequently-formed circuitry. In addition, no additional active area is required for the metal fuse in the chip other than internal dummy patterns that are already implemented.

公开(公告)号：US09093373B2

公开(公告)日：2015-07-28

申请号：US13965294

申请日：2013-08-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Chia Chang ,  Han-Wei Yang ,  Chen-Chung Lai ,  Kang-Min Kuo ,  Bor-Zen Tien

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/265 ,  H01L27/146 ,  H01L29/78 ,  H01L21/762

CPC classification number: H01L21/265 ,  H01L21/26513 ,  H01L21/76286 ,  H01L21/823814 ,  H01L27/0629 ,  H01L27/1463 ,  H01L29/6659 ,  H01L29/7833

Abstract: An integrated circuit includes a p-type region formed beneath a surface of a semiconductor substrate, and an n-type region formed beneath the surface of the semiconductor substrate. The n-type region meets the p-type region at a p-n junction. A diffusion barrier structure, which is beneath the surface of the semiconductor substrate and extends along a side of the p-n junction, limits lateral diffusion between the p-type region and n-type region.

Abstract translation: 集成电路包括形成在半导体衬底的表面下方的p型区域和形成在半导体衬底的表面下方的n型区域。 n型区域在p-n结处与p型区域相遇。 在半导体衬底的表面下方并且沿着p-n结的一侧延伸的扩散阻挡结构限制了p型区域和n型区域之间的横向扩散。

公开(公告)号：US09299658B2

公开(公告)日：2016-03-29

申请号：US14717995

申请日：2015-05-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chen-Chung Lai ,  Kang-Min Kuo ,  Yen-Ming Peng ,  Gwo-Chyuan Kuoh ,  Han-Wei Yang ,  Yi-Ruei Lin ,  Chin-Chia Chang ,  Ying-Chieh Liao ,  Che-Chia Hsu ,  Bor-Zen Tien

IPC: H01L21/762 ,  H01L21/02 ,  H01L29/06 ,  H01L23/525 ,  H01L21/306 ,  H01L21/3213 ,  H01L29/167

CPC classification number: H01L23/5256 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/306 ,  H01L21/32136 ,  H01L21/563 ,  H01L21/76202 ,  H01L21/76224 ,  H01L23/3171 ,  H01L29/0649 ,  H01L29/167 ,  H01L29/66477 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device with the metal fuse and a fabricating method thereof are provided. The metal fuse connects an electronic component (e.g., a transistor) and a existing dummy feature which is grounded. The protection of the metal fuse can be designed to start at the beginning of the metallization formation processes. The grounded dummy feature provides a path for the plasma charging to the ground during the entire back end of the line process. The metal fuse is a process level protection as opposed to the diode, which is a circuit level protection. As a process level protection, the metal fuse protects subsequently-formed circuitry. In addition, no additional active area is required for the metal fuse in the chip other than internal dummy patterns that are already implemented.

Abstract translation: 提供了具有金属熔断器的半导体器件及其制造方法。 金属熔断器连接电子部件（例如，晶体管）和接地的现有虚拟特征。 金属保险丝的保护可以设计为在金属化形成工艺开始时开始。 接地的虚拟特征提供了在线路过程的整个后端期间等离子体对地面充电的路径。 金属保险丝是与二极管相反的过程电平保护，这是电路级保护。 作为工艺级保护，金属保险丝保护随后形成的电路。 此外，除了已经实现的内部虚拟图案之外，芯片中的金属熔断器不需要额外的有源区域。

公开(公告)号：US20150001592A1

公开(公告)日：2015-01-01

申请号：US13930161

申请日：2013-06-28

Applicant: Taiwan Semiconductor Manufacturing Co., LTD.

Inventor： Chen-Chung Lai ,  Kang-Min Kuo ,  Yen-Ming Peng ,  Gwo-Chyuan Kuoh ,  Han-Wei Yang ,  Yi-Ruei Lin ,  Chin-Chia Chang ,  Ying-Chieh Liao ,  Che-Chia Hsu ,  Bor-Zen Tien

IPC: H01L23/525 ,  H01L21/306

CPC classification number: H01L23/5256 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/306 ,  H01L21/32136 ,  H01L21/563 ,  H01L21/76202 ,  H01L21/76224 ,  H01L23/3171 ,  H01L29/0649 ,  H01L29/167 ,  H01L29/66477 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device with the metal fuse is provided. The metal fuse connects an electronic component (e.g., a transistor) and a existing dummy feature which is grounded. The protection of the metal fuse can be designed to start at the beginning of the metallization formation processes. The grounded dummy feature provides a path for the plasma charging to the ground during the entire back end of the line process. The metal fuse is a process level protection as opposed to the diode, which is a circuit level protection. As a process level protection, the metal fuse protects subsequently-formed circuitry. In addition, no additional active area is required for the metal fuse in the chip other than internal dummy patterns that are already implemented.

Abstract translation: 提供具有金属保险丝的半导体器件。 金属熔断器连接电子部件（例如，晶体管）和接地的现有虚拟特征。 金属保险丝的保护可以设计为在金属化形成工艺开始时开始。 接地的虚拟特征提供了在线路过程的整个后端期间等离子体对地面充电的路径。 金属保险丝是与二极管相反的过程电平保护，这是电路级保护。 作为工艺级保护，金属保险丝保护随后形成的电路。 此外，除了已经实现的内部虚拟图案之外，芯片中的金属熔断器不需要额外的有源区域。