公开(公告)号：US09419099B2

公开(公告)日：2016-08-16

申请号：US14688720

申请日：2015-04-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Pin Hsu ,  Harry Chuang ,  Kong-Beng Thei

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/49 ,  H01L29/51

CPC分类号： H01L29/66545 ,  H01L21/823807 ,  H01L21/823864 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： The present disclosure provides a method for fabricating a semiconductor device that includes forming a gate stack over a silicon substrate, forming dummy spacers on sidewalls of the gate stack, isotropically etching the silicon substrate to form recess regions on either side of the gate stack, forming a semiconductor material in the recess regions, the semiconductor material being different from the silicon substrate, removing the dummy spacers, forming spacer layers having an oxide-nitride-oxide configuration over the gate stack and the semiconductor material, and etching the spacer layers to form gate spacers on the sidewalls of the gate stack.

公开(公告)号：US20130196496A1

公开(公告)日：2013-08-01

申请号：US13794621

申请日：2013-03-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chiung-Han Yeh ,  Ming-Yuan Wu ,  Kong-Beng Thei ,  Harry Chuang ,  Mong-Song Liang

IPC分类号： H01L29/66

CPC分类号： H01L29/66606 ,  H01L21/823814 ,  H01L21/823871

摘要： A method is provided that includes providing a substrate; forming a transistor in the substrate, the transistor having a dummy gate; forming a dielectric layer over the substrate and transistor; forming a contact feature in the dielectric layer; and after forming the contact feature, replacing the dummy gate of the transistor with a metal gate. An exemplary contact feature is a dual contact.

摘要翻译： 提供了一种提供基板的方法， 在衬底中形成晶体管，晶体管具有虚拟栅极; 在衬底和晶体管上形成介电层; 在介电层中形成接触特征; 并且在形成接触特征之后，用金属栅极替换晶体管的虚拟栅极。 示例性接触特征是双重接触。

公开(公告)号：US08728900B2

公开(公告)日：2014-05-20

申请号：US13649844

申请日：2012-10-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Harry Chuang ,  Mong-Song Liang ,  Wen-Chih Yang ,  Chien-Liang Chen ,  Chii-Horng Li

IPC分类号： H01L21/20

CPC分类号： H01L27/0629 ,  H01L27/105 ,  H01L27/11 ,  H01L27/1116 ,  H01L28/20 ,  H01L28/40 ,  H01L29/94

摘要： An integrated circuit structure includes a semiconductor substrate, and a first and a second MOS device. The first MOS device includes a first gate dielectric over the semiconductor substrate, wherein the first gate dielectric is planar; and a first gate electrode over the first gate dielectric. The second MOS device includes a second gate dielectric over the semiconductor substrate; and a second gate electrode over the second gate dielectric. The second gate electrode has a height greater than a height of the first gate electrode. The second gate dielectric includes a planar portion underlying the second gate electrode, and sidewall portions extending on sidewalls of the second gate electrode.

摘要翻译： 集成电路结构包括半导体衬底和第一和第二MOS器件。 第一MOS器件包括半导体衬底上的第一栅极电介质，其中第一栅极电介质是平面的; 以及位于第一栅极电介质上的第一栅电极。 第二MOS器件包括半导体衬底上的第二栅极电介质; 以及在所述第二栅极电介质上方的第二栅电极。 第二栅电极的高度大于第一栅电极的高度。 第二栅极电介质包括在第二栅电极下面的平面部分和在第二栅电极的侧壁上延伸的侧壁部分。

公开(公告)号：US20150228790A1

公开(公告)日：2015-08-13

申请号：US14688720

申请日：2015-04-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Pin Hsu ,  Harry Chuang ,  Kong-Beng Thei

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/66

CPC分类号： H01L29/66545 ,  H01L21/823807 ,  H01L21/823864 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： The present disclosure provides a method for fabricating a semiconductor device that includes forming a gate stack over a silicon substrate, forming dummy spacers on sidewalls of the gate stack, isotropically etching the silicon substrate to form recess regions on either side of the gate stack, forming a semiconductor material in the recess regions, the semiconductor material being different from the silicon substrate, removing the dummy spacers, forming spacer layers having an oxide-nitride-oxide configuration over the gate stack and the semiconductor material, and etching the spacer layers to form gate spacers on the sidewalls of the gate stack.

摘要翻译： 本公开提供了一种制造半导体器件的方法，该方法包括在硅衬底上形成栅极叠层，在栅极叠层的侧壁上形成虚设间隔物，各向同性地蚀刻硅衬底以在栅叠层的任一侧上形成凹陷区，形成 在所述凹部区域中的半导体材料，所述半导体材料与所述硅衬底不同，去除所述虚设衬垫，在所述栅极堆叠和所述半导体材料上形成具有氧化物 - 氮化物 - 氧化物构造的间隔层，并蚀刻所述间隔层以形成 栅极叠层的侧壁上的栅极间隔物。

公开(公告)号：US08669153B2

公开(公告)日：2014-03-11

申请号：US13794621

申请日：2013-03-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chiung-Han Yeh ,  Ming-Yuan Wu ,  Kong-Beng Thei ,  Harry Chuang ,  Mong-Song Liang

IPC分类号： H01L21/8238

CPC分类号： H01L29/66606 ,  H01L21/823814 ,  H01L21/823871

摘要： A method is provided that includes providing a substrate; forming a transistor in the substrate, the transistor having a dummy gate; forming a dielectric layer over the substrate and transistor; forming a contact feature in the dielectric layer; and after forming the contact feature, replacing the dummy gate of the transistor with a metal gate. An exemplary contact feature is a dual contact.

摘要翻译： 提供了一种提供基板的方法， 在衬底中形成晶体管，晶体管具有虚拟栅极; 在衬底和晶体管上形成介电层; 在介电层中形成接触特征; 并且在形成接触特征之后，用金属栅极替换晶体管的虚拟栅极。 示例性接触特征是双重接触。