公开(公告)号：US20230395436A1

公开(公告)日：2023-12-07

申请号：US17834202

申请日：2022-06-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Yuan Wu ,  Ka-Hing Fung ,  Min Jiao ,  Da-Wen Lin ,  Wei-Yuan Jheng

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/265 ,  H01L21/266 ,  H01L29/66

CPC分类号： H01L21/823892 ,  H01L27/0928 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/78696 ,  H01L21/0259 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/66545 ,  H01L29/66742

摘要： Semiconductor devices and methods are provided. In an embodiment, a method includes providing a workpiece including a first hard mask layer on a top surface of a substrate, performing an ion implantation process to form a doped region in the substrate, after the performing of the ion implantation process, annealing the workpiece at temperature T1. The method also includes selectively removing the first hard mask layer, after the selectively removing of the first hard mask layer, performing a pre-bake process at temperature T2, and, after the performing of the pre-bake process, epitaxially growing a vertical stack of alternating channel layers and sacrificial layers on the substrate, where the temperature T2 is lower than the temperature T1.

公开(公告)号：US20210257479A1

公开(公告)日：2021-08-19

申请号：US17021640

申请日：2020-09-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Che-Lun Chang ,  Shiao-Shin Cheng ,  Ji-Yin Tsai ,  Yu-Lin Tsai ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Jiun-Ming Kuo ,  Ming-Jie Huang ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/165 ,  H01L29/08 ,  H01L29/78

摘要： A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.

公开(公告)号：US11316030B2

公开(公告)日：2022-04-26

申请号：US17021640

申请日：2020-09-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Che-Lun Chang ,  Shiao-Shin Cheng ,  Ji-Yin Tsai ,  Yu-Lin Tsai ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Jiun-Ming Kuo ,  Ming-Jie Huang ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/165 ,  H01L29/08 ,  H01L29/78

摘要： A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.

公开(公告)号：US20170077096A1

公开(公告)日：2017-03-16

申请号：US15362769

申请日：2016-11-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Yuan Wu ,  Yen-Po Lin ,  Yu-Shan Lu ,  Che-Yuan Hsu

IPC分类号： H01L27/092 ,  H01L21/3065 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/08

CPC分类号： H01L27/092 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

摘要： A device comprises a substrate comprising a first portion and a second portion separated by an isolation region, a first gate structure over the first portion, a first drain/source region and a second drain/source region in the first portion and on opposite sides of the first gate structure, wherein the first drain/source region and the second drain/source have concave surfaces, a second gate structure over the second portion and a third drain/source region and a fourth drain/source region in the second portion and on opposite sides of the second gate structure, wherein the third drain/source region and the fourth drain/source have the concave surfaces.

摘要翻译： 一种器件包括：衬底，其包括第一部分和由隔离区隔开的第二部分，第一部分上的第一栅极结构，第一部分中的第一漏极/源极区域和第二漏极/源极区域， 所述第一栅极结构，其中所述第一漏极/源极区域和所述第二漏极/源极具有凹面，所述第二部分上的第二栅极结构以及所述第二部分中的第三漏极/源极区域和第四漏极/源极区域， 第二栅极结构的相对侧，其中第三漏极/源极区域和第四漏极/源极具有凹面。

公开(公告)号：US09508718B2

公开(公告)日：2016-11-29

申请号：US14585083

申请日：2014-12-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Yuan Wu ,  Yen-Po Lin ,  Yu-Shan Lu ,  Che-Yuan Hsu

IPC分类号： H01L21/336 ,  H01L27/092 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/306 ,  H01L29/165 ,  H01L29/06 ,  H01L21/02 ,  H01L21/265 ,  H01L21/8238

CPC分类号： H01L27/092 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

摘要： A device comprises a substrate comprising a first portion and a second portion separated by an isolation region, a first gate structure over the first portion, a first drain/source region and a second drain/source region in the first portion and on opposite sides of the first gate structure, wherein the first drain/source region and the second drain/source have concave surfaces, a second gate structure over the second portion and a third drain/source region and a fourth drain/source region in the second portion and on opposite sides of the second gate structure, wherein the third drain/source region and the fourth drain/source have the concave surfaces.

摘要翻译： 一种器件包括：衬底，其包括第一部分和由隔离区隔开的第二部分，第一部分上的第一栅极结构，第一部分中的第一漏极/源极区域和第二漏极/源极区域， 所述第一栅极结构，其中所述第一漏极/源极区域和所述第二漏极/源极具有凹面，所述第二部分上的第二栅极结构以及所述第二部分中的第三漏极/源极区域和第四漏极/源极区域， 第二栅极结构的相对侧，其中第三漏极/源极区域和第四漏极/源极具有凹面。

公开(公告)号：US08669153B2

公开(公告)日：2014-03-11

申请号：US13794621

申请日：2013-03-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chiung-Han Yeh ,  Ming-Yuan Wu ,  Kong-Beng Thei ,  Harry Chuang ,  Mong-Song Liang

IPC分类号： H01L21/8238

CPC分类号： H01L29/66606 ,  H01L21/823814 ,  H01L21/823871

摘要： A method is provided that includes providing a substrate; forming a transistor in the substrate, the transistor having a dummy gate; forming a dielectric layer over the substrate and transistor; forming a contact feature in the dielectric layer; and after forming the contact feature, replacing the dummy gate of the transistor with a metal gate. An exemplary contact feature is a dual contact.

摘要翻译： 提供了一种提供基板的方法， 在衬底中形成晶体管，晶体管具有虚拟栅极; 在衬底和晶体管上形成介电层; 在介电层中形成接触特征; 并且在形成接触特征之后，用金属栅极替换晶体管的虚拟栅极。 示例性接触特征是双重接触。

公开(公告)号：US09263396B2

公开(公告)日：2016-02-16

申请号：US14090757

申请日：2013-11-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chun-Liang Shen ,  Ming-Yuan Wu ,  Chiung-Han Yeh ,  Kong-Beng Thei ,  Harry-Hak-Lay Chuang

IPC分类号： H01L21/00 ,  H01L23/544 ,  H01L21/3105 ,  H01L21/8238 ,  H01L23/58

CPC分类号： H01L23/544 ,  H01L21/31051 ,  H01L21/823828 ,  H01L23/585 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided which includes a semiconductor substrate having a first region and a second region, the first and second regions being isolated from each other, a plurality of transistors formed in the first region, an alignment mark formed in the second region, the alignment mark having a plurality of active regions in a first direction, and a dummy gate structure formed over the alignment mark, the dummy gate structure having a plurality of lines in a second direction different from the first direction.

公开(公告)号：US20140131814A1

公开(公告)日：2014-05-15

申请号：US14090757

申请日：2013-11-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chun-Liang Shen ,  Ming-Yuan Wu ,  Chiung-Han Yeh ,  Kong-Beng Thei ,  Harry-Hak-Lay Chuang

IPC分类号： H01L23/544

CPC分类号： H01L23/544 ,  H01L21/31051 ,  H01L21/823828 ,  H01L23/585 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided which includes a semiconductor substrate having a first region and a second region, the first and second regions being isolated from each other, a plurality of transistors formed in the first region, an alignment mark formed in the second region, the alignment mark having a plurality of active regions in a first direction, and a dummy gate structure formed over the alignment mark, the dummy gate structure having a plurality of lines in a second direction different from the first direction.

摘要翻译： 提供一种半导体器件，其包括具有第一区域和第二区域的半导体衬底，第一和第二区域彼此隔离，形成在第一区域中的多个晶体管，形成在第二区域中的对准标记， 对准标记具有在第一方向上的多个有效区域，以及形成在所述对准标记上的伪栅极结构，所述伪栅极结构在与所述第一方向不同的第二方向上具有多条线。

公开(公告)号：US09917088B2

公开(公告)日：2018-03-13

申请号：US15362769

申请日：2016-11-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Yuan Wu ,  Yen-Po Lin ,  Yu-Shan Lu ,  Che-Yuan Hsu

IPC分类号： H01L27/00 ,  H01L27/092 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/306 ,  H01L29/165 ,  H01L29/06 ,  H01L21/02 ,  H01L21/265 ,  H01L21/8238 ,  H01L21/3065 ,  H01L21/308

CPC分类号： H01L27/092 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

摘要： A device comprises a substrate comprising a first portion and a second portion separated by an isolation region, a first gate structure over the first portion, a first drain/source region and a second drain/source region in the first portion and on opposite sides of the first gate structure, wherein the first drain/source region and the second drain/source have concave surfaces, a second gate structure over the second portion and a third drain/source region and a fourth drain/source region in the second portion and on opposite sides of the second gate structure, wherein the third drain/source region and the fourth drain/source have the concave surfaces.

公开(公告)号：US20160190133A1

公开(公告)日：2016-06-30

申请号：US14585083

申请日：2014-12-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Yuan Wu ,  Yen-Po Lin ,  Yu-Shan Lu ,  Che-Yuan Hsu

IPC分类号： H01L27/092 ,  H01L29/08 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/06 ,  H01L21/02 ,  H01L21/265 ,  H01L29/78 ,  H01L21/306

CPC分类号： H01L27/092 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

摘要： A device comprises a substrate comprising a first portion and a second portion separated by an isolation region, a first gate structure over the first portion, a first drain/source region and a second drain/source region in the first portion and on opposite sides of the first gate structure, wherein the first drain/source region and the second drain/source have concave surfaces, a second gate structure over the second portion and a third drain/source region and a fourth drain/source region in the second portion and on opposite sides of the second gate structure, wherein the third drain/source region and the fourth drain/source have the concave surfaces.

摘要翻译： 一种器件包括：衬底，其包括第一部分和由隔离区隔开的第二部分，第一部分上的第一栅极结构，第一部分中的第一漏极/源极区域和第二漏极/源极区域， 所述第一栅极结构，其中所述第一漏极/源极区域和所述第二漏极/源极具有凹面，所述第二部分上的第二栅极结构以及所述第二部分中的第三漏极/源极区域和第四漏极/源极区域， 第二栅极结构的相对侧，其中第三漏极/源极区域和第四漏极/源极具有凹面。