公开(公告)号：US20230378040A1

公开(公告)日：2023-11-23

申请号：US18359909

申请日：2023-07-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sung-Yueh Wu ,  Chien-Ling Hwang ,  Jen-Chun Liao ,  Ching-Hua Hsieh ,  Pei-Hsuan Lee ,  Chia-Hung Liu

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L21/48

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L23/3128 ,  H01L23/49833 ,  H01L21/486 ,  H01L21/4857 ,  H01L24/73

摘要： A package structure includes a carrier substrate, a die, and an encapsulant. The carrier substrate includes through carrier vias (TCV). The die is disposed over the carrier substrate. The die includes a semiconductor substrate and conductive posts disposed over the semiconductor substrate. The conductive posts face away from the carrier substrate. The encapsulant laterally encapsulates the die.

公开(公告)号：US20220319903A1

公开(公告)日：2022-10-06

申请号：US17367631

申请日：2021-07-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Chun Liao ,  Sung-Yueh Wu ,  Chien-Ling Hwang ,  Ching-Hua Hsieh

IPC分类号： H01L21/683 ,  H01L21/687

摘要： An apparatus and a method for handling a semiconductor substrate are provided. The apparatus includes a chuck table and a first flexible member. The chuck table includes a carrying surface, a first recess provided within the carrying surface, and a vacuum channel disposed below the carrying surface, and the chuck table is configured to hold the semiconductor substrate. The first flexible member is disposed within the first recess and includes a top surface protruded from the first recess, and the first flexible member is compressed as the semiconductor substrate presses against the first flexible member.

公开(公告)号：US20240332132A1

公开(公告)日：2024-10-03

申请号：US18740523

申请日：2024-06-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Chun Liao ,  Sung-Yueh Wu ,  Chien-Ling Hwang ,  Ching-Hua Hsieh

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L21/768 ,  H01L23/15 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L23/481 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5386

摘要： A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.

公开(公告)号：US20220278023A1

公开(公告)日：2022-09-01

申请号：US17185966

申请日：2021-02-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Chun Liao ,  Sung-Yueh Wu ,  Chien-Ling Hwang ,  Ching-Hua Hsieh

IPC分类号： H01L23/48 ,  H01L23/15 ,  H01L21/768 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L21/56

摘要： A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.

公开(公告)号：US12040255B2

公开(公告)日：2024-07-16

申请号：US18361917

申请日：2023-07-31

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Chun Liao ,  Sung-Yueh Wu ,  Chien-Ling Hwang ,  Ching-Hua Hsieh

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L21/768 ,  H01L23/15 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L23/481 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5386

摘要： A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.

公开(公告)号：US20230386974A1

公开(公告)日：2023-11-30

申请号：US18361917

申请日：2023-07-31

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Chun Liao ,  Sung-Yueh Wu ,  Chien-Ling Hwang ,  Ching-Hua Hsieh

IPC分类号： H01L23/48 ,  H01L23/15 ,  H01L21/768 ,  H01L23/498 ,  H01L21/56 ,  H01L23/538 ,  H01L23/31

CPC分类号： H01L23/481 ,  H01L23/15 ,  H01L21/76898 ,  H01L23/49838 ,  H01L21/56 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/3128 ,  H01L23/49833

摘要： A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.

公开(公告)号：US20220293505A1

公开(公告)日：2022-09-15

申请号：US17199348

申请日：2021-03-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sung-Yueh Wu ,  Chien-Ling Hwang ,  Jen-Chun Liao ,  Ching-Hua Hsieh ,  Pei-Hsuan Lee ,  Chia-Hung Liu

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L21/48

摘要： A package structure includes a carrier substrate, a die, and a first redistribution structure. The carrier substrate has a first surface and a second surface opposite to the first surface. The carrier substrate includes an insulating body and through carrier vias (TCV) embedded in the insulating body. The die is disposed over the firs surface of the carrier substrate. The die is electrically connected to the TCVs. The first redistribution structure is disposed on the second surface of the carrier substrate.

公开(公告)号：US11764127B2

公开(公告)日：2023-09-19

申请号：US17185966

申请日：2021-02-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Chun Liao ,  Sung-Yueh Wu ,  Chien-Ling Hwang ,  Ching-Hua Hsieh

IPC分类号： H01L23/48 ,  H01L23/15 ,  H01L21/768 ,  H01L23/498 ,  H01L21/56 ,  H01L23/538 ,  H01L23/31

CPC分类号： H01L23/481 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5386

摘要： A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.

公开(公告)号：US11756872B2

公开(公告)日：2023-09-12

申请号：US17199348

申请日：2021-03-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sung-Yueh Wu ,  Chien-Ling Hwang ,  Jen-Chun Liao ,  Ching-Hua Hsieh ,  Pei-Hsuan Lee ,  Chia-Hung Liu

IPC分类号： H01L23/495 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L21/4857 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73253

摘要： A package structure includes a carrier substrate, a die, and a first redistribution structure. The carrier substrate has a first surface and a second surface opposite to the first surface. The carrier substrate includes an insulating body and through carrier vias (TCV) embedded in the insulating body. The die is disposed over the firs surface of the carrier substrate. The die is electrically connected to the TCVs. The first redistribution structure is disposed on the second surface of the carrier substrate.

公开(公告)号：US20230268316A1

公开(公告)日：2023-08-24

申请号：US17674847

申请日：2022-02-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sung-Yueh Wu ,  Chien-Ling Hwang ,  Jen-Chun Liao ,  Ching-Hua Hsieh

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L24/96 ,  H01L24/16 ,  H01L23/49822 ,  H01L23/3114 ,  H01L21/561 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/81947

摘要： A package structure includes a semiconductor device including a conductive feature, a joint layer, a pillar structure, an encapsulant and a RDL structure. The joint layer is disposed on the conductive feature. The pillar structure is disposed on and coupled to the semiconductor device through the joint layer. The encapsulant laterally encapsulates the semiconductor device and the pillar structure. The RDL structure is electrically connected to the semiconductor device.