公开(公告)号：US11832529B2

公开(公告)日：2023-11-28

申请号：US17724920

申请日：2022-04-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Harry-Hak-Lay Chuang ,  Hung Cho Wang ,  Tong-Chern Ong ,  Wen-Ting Chu ,  Yu-Wen Liao ,  Kuei-Hung Shen ,  Kuo-Yuan Tu ,  Sheng-Huang Huang

IPC分类号： H10N50/80 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85 ,  H10N70/00 ,  H10N70/20

CPC分类号： H10N50/80 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85 ,  H10N70/011 ,  H10N70/021 ,  H10N70/063 ,  H10N70/20 ,  H10N70/826 ,  H10N70/8833

摘要： The present disclosure relates to an integrated circuit. The integrated circuit includes a an inter-layer dielectric (ILD) structure laterally surrounding a conductive interconnect. A dielectric protection layer is disposed over the ILD structure and a passivation layer is disposed over the dielectric protection layer. The passivation layer includes a protrusion extending outward from an upper surface of the passivation layer. A bottom electrode continuously extends from over the passivation layer to between sidewalls of the passivation layer. A data storage element is over the bottom electrode and a top electrode is over the data storage element.

公开(公告)号：US20220246838A1

公开(公告)日：2022-08-04

申请号：US17724920

申请日：2022-04-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Harry-Hak-Lay Chuang ,  Hung Cho Wang ,  Tong-Chern Ong ,  Wen-Ting Chu ,  Yu-Wen Liao ,  Kuei-Hung Shen ,  Kuo-Yuan Tu ,  Sheng-Huang Huang

IPC分类号： H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L45/00

摘要： The present disclosure relates to an integrated circuit. The integrated circuit includes a an inter-layer dielectric (ILD) structure laterally surrounding a conductive interconnect. A dielectric protection layer is disposed over the ILD structure and a passivation layer is disposed over the dielectric protection layer. The passivation layer includes a protrusion extending outward from an upper surface of the passivation layer. A bottom electrode continuously extends from over the passivation layer to between sidewalls of the passivation layer. A data storage element is over the bottom electrode and a top electrode is over the data storage element.

公开(公告)号：US20230371396A1

公开(公告)日：2023-11-16

申请号：US18357332

申请日：2023-07-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Harry-Hak-Lay Chuang ,  Hung Cho Wang ,  Tong-Chern Ong ,  Wen-Ting Chu ,  Yu-Wen Liao ,  Kuei-Hung Shen ,  Kuo-Yuan Tu ,  Sheng-Huang Huang

IPC分类号： H10N50/80 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85 ,  H10N70/00 ,  H10N70/20

CPC分类号： H10N50/80 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85 ,  H10N70/011 ,  H10N70/20 ,  H10N70/021 ,  H10N70/063 ,  H10N70/826 ,  H10N70/8833

摘要： The present disclosure relates to an integrated chip. The integrated chip includes a bottom electrode disposed over a substrate. The bottom electrode has a first thickness along an outermost edge and a second thickness between the outermost edge and a lateral center of the bottom electrode. The first thickness is larger than the second thickness. A data storage structure is over the bottom electrode and a top electrode is over the data storage structure.