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公开(公告)号：US5905284A
公开(公告)日：1999-05-18
申请号：US859366
申请日：1997-05-20
申请人： Taizo Fujii , Takehiro Hirai , Sugao Fujinaga
发明人： Taizo Fujii , Takehiro Hirai , Sugao Fujinaga
IPC分类号： H01L21/265 , H01L21/336 , H01L21/8234 , H01L27/06 , H01L27/092 , H01L29/10 , H01L29/78 , H01L29/76 , H01L29/94
CPC分类号： H01L29/7816 , H01L21/26586 , H01L21/823412 , H01L27/0623 , H01L27/0922 , H01L29/66674 , H01L29/7801 , H01L29/1095
摘要： In forming a P.sup.- body diffused layer in a portion on the source side of an N.sup.- drain diffused layer of a DMOSFET, P-type impurity ions are implanted at a large tilt angle to reach a part of a region underlying an N.sup.+ gate electrode by using, as a mask, a resist film having an opening corresponding to a region in which the body diffused layer of the DMOSFET is to be formed and the N.sup.+ gate electrode so as to be activated. Thereafter, an N.sup.+ source diffused layer and an N.sup.+ drain diffused layer are formed in the P.sup.- body diffused layer and in the N.sup.- drain diffused layer, respectively. Since a high-temperature drive-in process need not be performed to introduce the P-type impurity ions into the region underlying the N.sup.+ gate electrode, a reduction or variations in threshold voltage and the degradation of a gate oxide film each caused by the impurity diffused from the N.sup.+ gate electrode can be prevented. Consequently, there is provided a semiconductor device having a DMOSFET mounted thereon which has a reduced on-resistance and suppresses the activation of a parasitic bipolar transistor due to reduced variations in threshold voltage and a high-quality gate oxide film.
摘要翻译： 在DMOSFET的N-漏极扩散层的源极侧的部分中形成P-体扩散层时，以大的倾斜角注入P型杂质离子，以到达N +栅电极下方的一部分区域 通过使用具有对应于要形成DMOSFET的体漫射层的区域的开口和N +栅电极被激活的抗蚀剂膜。 此后，分别在P-体扩散层和N-漏极扩散层中形成N +源极扩散层和N +漏极扩散层。 由于不需要进行高温驱入工艺来将P型杂质离子引入到N +栅电极下面的区域，所以由杂质引起的阈值电压和栅极氧化膜的劣化的降低或变化 可以防止从N +栅电极扩散。 因此，提供了一种其上安装有DMOSFET的半导体器件，其具有降低的导通电阻，并且由于阈值电压的变化和高质量的栅氧化膜而抑制了寄生双极晶体管的激活。
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公开(公告)号：US5817551A
公开(公告)日：1998-10-06
申请号：US701913
申请日：1996-08-23
申请人： Taizo Fujii , Takehiro Hirai , Sugao Fujinaga
发明人： Taizo Fujii , Takehiro Hirai , Sugao Fujinaga
IPC分类号： H01L21/265 , H01L21/336 , H01L21/8234 , H01L27/06 , H01L27/092 , H01L29/10 , H01L29/78
CPC分类号： H01L29/7816 , H01L21/26586 , H01L21/823412 , H01L27/0623 , H01L27/0922 , H01L29/66674 , H01L29/7801 , H01L29/1095
摘要： In forming a P.sup.- body diffused layer in a portion on the source side of an N.sup.- drain diffused layer of a DMOSFET, P-type impurity ions are implanted at a large tilt angle to reach a part of a region underlying an N.sup.+ gate electrode by using, as a mask, a resist film having an opening corresponding to a region in which the body diffused layer of the DMOSFET is to be formed and the N.sup.+ gate electrode so as to be activated. Thereafter, an N.sup.+ source diffused layer and an N.sup.+ drain diffused layer are formed in the P.sup.- body diffused layer and in the N.sup.- drain diffused layer, respectively. Since a high-temperature drive-in process need not be performed to introduce the P-type impurity ions into the region underlying the N.sup.+ gate electrode, a reduction or variations in threshold voltage and the degradation of a gate oxide film each caused by the impurity diffused from the N.sup.+ gate electrode can be prevented. Consequently, there is provided a semiconductor device having a DMOSFET mounted thereon which has a reduced on-resistance and suppresses the activation of a parasitic bipolar transistor due to reduced variations in threshold voltage and a high-quality gate oxide film.
摘要翻译： 在DMOSFET的N-漏极扩散层的源极侧的部分中形成P-体扩散层时，以大的倾斜角注入P型杂质离子，以到达N +栅电极下方的一部分区域 通过使用具有对应于要形成DMOSFET的体漫射层的区域的开口和N +栅电极被激活的抗蚀剂膜。 此后，分别在P-体扩散层和N-漏极扩散层中形成N +源极扩散层和N +漏极扩散层。 由于不需要进行高温驱入工艺来将P型杂质离子引入到N +栅电极下面的区域，所以由杂质引起的阈值电压和栅极氧化膜的劣化的降低或变化 可以防止从N +栅电极扩散。 因此，提供了一种其上安装有DMOSFET的半导体器件，其具有降低的导通电阻，并且由于阈值电压的变化和高质量的栅氧化膜而抑制了寄生双极晶体管的激活。
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公开(公告)号：US5851863A
公开(公告)日：1998-12-22
申请号：US629248
申请日：1996-04-08
申请人： Taizo Fujii , Takehiro Hirai , Sugao Fujinaga
发明人： Taizo Fujii , Takehiro Hirai , Sugao Fujinaga
IPC分类号： H01L21/8249 , H01L27/06 , H01L21/8238
CPC分类号： H01L21/8249 , H01L27/0623
摘要： An n-type buried layer and an n-type epitaxial layer that becomes a collector layer of a pnp transistor are formed on a semiconductor substrate. A well and the collector layer are formed. Ions of an n-type impurity are implanted through a photoresist mask, to form an intrinsic base layer of the pnp transistor and a PT-VT diffusion layer with punchthrough stopper and threshold control functions of a pMOSFET. Ions of a p-type impurity are implanted through a photoresist mask at a shallow implantation depth than the previous step, to form an intrinsic base layer of an npn transistor and a channel dope layer of the pMOSFET. A buried channel is formed under the gate of the pMOSFET. Therefore pMOSFETs with good characteristics can be obtained. In this way, the present invention achieves bipolar transistors and MOSFETs with good characteristics, without having to increase the number of fabrication steps and the number of photoresist masks.
摘要翻译： 在半导体衬底上形成成为pnp晶体管的集电极层的n型掩埋层和n型外延层。 形成阱和集电极层。 通过光致抗蚀剂掩模注入n型杂质的离子，以形成pnp晶体管的本征基极层和具有穿通阻挡层的PT-VT扩散层和pMOSFET的阈值控制功能。 p型杂质的离子通过光致抗蚀剂掩模以比上一步骤浅的注入深度注入，以形成pMOSFET的npn晶体管和沟道掺杂层的本征基极层。 在pMOSFET的栅极下方形成掩埋沟道。 因此，可以获得具有良好特性的pMOSFET。 以这种方式，本发明实现了具有良好特性的双极晶体管和MOSFET，而不必增加制造步骤的数量和光致抗蚀剂掩模的数量。
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公开(公告)号：US09342879B2
公开(公告)日：2016-05-17
申请号：US14347127
申请日：2012-07-06
申请人： Yohei Minekawa , Kenji Nakahira , Minoru Harada , Takehiro Hirai , Ryo Nakagaki
发明人： Yohei Minekawa , Kenji Nakahira , Minoru Harada , Takehiro Hirai , Ryo Nakagaki
CPC分类号： G06T7/0004 , G06T7/001 , G06T2207/10061 , G06T2207/20016 , G06T2207/30148
摘要： A method for reviewing defect, comprising the steps of: as an image acquisition step, imaging a surface of a sample using arbitrary image acquisition condition selected from a plurality of image acquisition conditions and obtaining a defect image; as a defect position calculation step, proceeding the defect image obtained by the image acquisition step and calculating a defect position on the surface of the sample; as a defect detection accuracy calculation step, obtaining a defect detection accuracy of the defect position calculated by the defect position calculation step; and as a conclusion determination step, determinating whether the defect detection accuracy obtained by the defect detection accuracy calculation step meets a predetermined requirement or not; wherein until it is determined that the defect detection accuracy obtained by the defect detection accuracy calculation step meets a predetermined in the conclusion determination step, the image acquisition condition is selected from the plurality of image acquisition conditions once again and the image acquisition step, the defect position calculation step, the defect detection accuracy calculation step and the conclusion determination step are repeated.
摘要翻译： 一种检查缺陷的方法，包括以下步骤：作为图像获取步骤，使用从多个图像获取条件中选择的任意图像获取条件对样本的表面进行成像并获得缺陷图像; 作为缺陷位置计算步骤，进行通过图像获取步骤获得的缺陷图像，并计算样本表面上的缺陷位置; 作为缺陷检测精度计算步骤，获得由缺陷位置计算步骤计算的缺陷位置的缺陷检测精度; 以及作为结论确定步骤，确定由缺陷检测精度计算步骤获得的缺陷检测精度是否满足预定要求; 其中直到确定由缺陷检测精度计算步骤获得的缺陷检测精度在结论确定步骤中达到预定值时，再次从多个图像获取条件中选择图像获取条件，并且图像获取步骤，缺陷 位置计算步骤，重复缺陷检测精度计算步骤和结论确定步骤。
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公开(公告)号：US09342878B2
公开(公告)日：2016-05-17
申请号：US13991948
申请日：2011-10-24
CPC分类号： G06T7/0002 , G06T7/001 , G06T2200/24 , G06T2207/30148 , H01J37/222 , H01J37/28 , H01J2237/221 , H01J2237/24578 , H01J2237/24592 , H01J2237/2817
摘要： For inspection of a pattern such as a semiconductor device, it is useful to selectively detect a defect on the specific pattern in order to estimate the cause of the occurrence of the defect. An object of the invention is to provide a charged particle beam apparatus capable of setting, on the basis of the shape of the pattern on a sample, a region to be inspected. The invention is characterized in that the contour of the pattern on the sample is extracted using a template image obtained on the basis of an image of the sample, the region to be inspected is set on the basis of the contour of the pattern, a defect candidate is detected by comparing the image to be inspected with a comparative image, and the sample is inspected using a positional relationship between the region to be inspected and the defect candidate included in the region to be inspected.
摘要翻译： 为了检查诸如半导体器件的图案，有选择地检测特定图案上的缺陷以估计缺陷发生的原因。 本发明的目的是提供一种能够根据样品上的图案的形状来设定要检查的区域的带电粒子束装置。 本发明的特征在于，使用基于样本的图像获得的模板图像来提取样本上的图案的轮廓，基于图案的轮廓设置待检查的区域，缺陷 通过将待检查的图像与比较图像进行比较来检测候选物，并且使用待检查区域和包括在待检查区域中的缺陷候选物之间的位置关系来检查样品。
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公开(公告)号：US09136189B2
公开(公告)日：2015-09-15
申请号：US13318718
申请日：2010-05-25
申请人： Takehiro Hirai , Kenji Obara , Naoma Ban
发明人： Takehiro Hirai , Kenji Obara , Naoma Ban
CPC分类号： H01L22/20 , G06T7/001 , G06T2200/24 , G06T2207/10061 , G06T2207/30148 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A surface observation apparatus is achieved, which enables even a beginner to easily select an optimal evaluation indicator for each of various patterns to be evaluated without a trial and error approach. A plurality of images to be evaluated are input from an image processing unit (114) to an evaluation image input unit (113a) (in step 901). The input images to be evaluated are displayed on a display (115). A user rearranges the images in accordance with an evaluation criterion of the user while referencing the display (115), and defines an evaluation criterion (in step 902). Evaluation values are calculated for the input images (to be evaluated) using a plurality of evaluation indicators (in step 903). The evaluation values for each of the evaluation indicators are compared with the evaluation criterion defined by the user, and correlation coefficients are then calculated (in step 904). An evaluation indicator having the maximum absolute value of a correlation coefficient is automatically selected as an evaluation criterion that is closest to the evaluation criterion defined by the user (in step 905). The images are rearranged in order of correlation coefficient and a list of the images is displayed on the display (115) so that the images are arranged in order of evaluation value (in step 906).
摘要翻译： 实现了表面观察装置，即使初学者也能够在不进行试错法的情况下容易地选择要评估的各种图案中的各种图案的最佳评价指标。 将要评估的多个图像从图像处理单元（114）输入到评估图像输入单元（113a）（在步骤901中）。 待评估的输入图像显示在显示器（115）上。 用户根据用户的评价标准重新排列图像，同时参照显示器（115），并定义评估标准（步骤902）。 使用多个评价指标对输入图像（待评价）计算评价值（步骤903）。 将各评价指标的评价值与用户定义的评价标准进行比较，然后计算相关系数（步骤904）。 自动选择具有相关系数的最大绝对值的评估指标作为最接近用户定义的评估标准的评估标准（在步骤905中）。 按照相关系数的顺序重新排列图像，并且在显示器（115）上显示图像列表，使得以评估值的顺序排列图像（在步骤906中）。
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公开(公告)号：US08824773B2
公开(公告)日：2014-09-02
申请号：US13515643
申请日：2010-11-19
CPC分类号： H01J37/26 , G01N23/22 , G01N2223/421 , G01N2223/6116 , G01N2223/6466 , G06T7/0004 , G06T2200/24 , G06T2207/10061 , G06T2207/20081 , G06T2207/30148
摘要： A defect observation device including an input-output unit supplied with information of a taught defect, and information of an ideal output of the taught defect, and configured to display a processing result based upon a determined image processing parameter set; and an automatic determination unit configured to: select image processing parameter sets which are less in number than the total number of all image processing parameter sets, out of all image processing parameter sets, calculate image processing results on an input defect image, by using the selected image processing parameter sets, calculate a coincidence degree for each of the selected image processing parameter sets, estimate distribution of an index value in all image processing parameter sets from distribution of the coincidence degree for the selected image processing parameter sets, and determine an image processing parameter set to have a high coincidence degree out of all image processing parameter sets.
摘要翻译： 一种缺陷观察装置，包括：提供教导缺陷的信息的输入输出单元和教导缺陷的理想输出的信息，并且被配置为基于确定的图像处理参数集显示处理结果; 以及自动确定单元，被配置为：在所有图像处理参数组中，选择数量少于所有图像处理参数组的总数的图像处理参数组，通过使用所述图像处理参数组来计算输入缺陷图像上的图像处理结果 选择的图像处理参数组，对所选择的图像处理参数组中的每一个计算一致度，根据所选择的图像处理参数组的重合程度的分布来估计所有图像处理参数组中的索引值的分布，并且确定图像 处理参数设置为在所有图像处理参数集中具有高重合度。
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公开(公告)号：US20130140457A1
公开(公告)日：2013-06-06
申请号：US13515643
申请日：2010-11-19
IPC分类号： H01J37/26
CPC分类号： H01J37/26 , G01N23/22 , G01N2223/421 , G01N2223/6116 , G01N2223/6466 , G06T7/0004 , G06T2200/24 , G06T2207/10061 , G06T2207/20081 , G06T2207/30148
摘要： A defect observation device supplied with a taught defect and an ideal output obtained by conducting image processing on the taught defect as its input and capable of conducting work of setting image processing parameters required to classify defect kinds easily and fast is provided.The defect observation device includes an input-output unit 123 which is supplied with information of a taught defect and information of an ideal output of the taught defect and which displays a processing result based upon a determined image processing parameter set, and an automatic determination unit 124 for selecting image processing parameter sets which are less in number than the total number of all image processing parameter sets, out of all image processing parameter sets, calculating image processing results on an input defect image, by using the selected image processing parameter sets, calculating a coincidence degree for each of the selected image processing parameter sets, estimating distribution of an index value in all image processing parameter sets from distribution of the coincidence degree for the selected image processing parameter sets, and determining an image processing parameter set having a high coincidence degree out of all image processing parameter sets.
摘要翻译： 提供了一种缺陷观察装置，其提供了教导缺陷和通过对教导缺陷进行图像处理而获得的理想输出作为其输入并且能够进行设置容易且快速地分类缺陷种类所需的图像处理参数的工作。 缺陷观察装置包括输入输出单元123，该输入输出单元123被提供有教导缺陷的信息和教导缺陷的理想输出的信息，并且基于确定的图像处理参数集显示处理结果;以及自动确定单元 124，用于选择数量少于所有图像处理参数组的总数的图像处理参数组，在所有图像处理参数组中，通过使用所选择的图像处理参数集计算输入缺陷图像上的图像处理结果， 计算所选择的图像处理参数组中的每一个的一致度，根据所选择的图像处理参数组的一致度分布来估计所有图像处理参数组中的索引值的分布，并且确定具有高的图像处理参数组 所有图像处理参数集合的重合度。
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9.发明授权公开(公告)号：US08309919B2
公开(公告)日：2012-11-13
申请号：US12352357
申请日：2009-01-12
申请人： Kenji Obara , Takehiro Hirai
发明人： Kenji Obara , Takehiro Hirai
CPC分类号： G01N23/2251 , H01J37/222 , H01J37/244 , H01J37/26 , H01J37/28 , H01J2237/24475 , H01J2237/2448 , H01J2237/24592 , H01J2237/28 , H01J2237/2809 , H01J2237/2817
摘要： An object of the present invention is to provide a suitable method of observing a wafer edge by using an electron microscope. The electron microscope includes a column which can take an image in being tilted, and thus allows a wafer edge to be observed from an oblique direction.
摘要翻译： 本发明的目的是提供一种使用电子显微镜观察晶片边缘的合适方法。 电子显微镜包括可以使图像倾斜的列，从而允许从倾斜方向观察晶片边缘。
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公开(公告)号：US08108172B2
公开(公告)日：2012-01-31
申请号：US12953170
申请日：2010-11-23
申请人： Takehiro Hirai , Kenji Obara , Kohei Yamaguchi
发明人： Takehiro Hirai , Kenji Obara , Kohei Yamaguchi
CPC分类号： H01J37/265 , H01J37/28 , H01J2237/221 , H01J2237/2817 , H01J2237/2826
摘要： A review apparatus for reviewing a specimen by moving the specimen to pre-calculated coordinate includes: a function to measure a deviation amount between the pre-calculated coordinates and coordinates of an actual position of the specimen; a function to optimize a coordinate correcting expression to minimize the measured deviation amount; and a function to determine that the deviation amounts have converged. When the deviation amounts have converged, the measurement for the coordinate-correcting-expression optimization is terminated, and a field of view necessary for the specimen to be within the field of view is set according to a convergence value of the calculated deviation amount.
摘要翻译： 用于通过将样本移动到预先计算的坐标来检查样本的检查装置包括：测量预先计算的坐标和样本的实际位置的坐标之间的偏差量的函数; 优化坐标校正表达式以最小化所测量的偏差量的函数; 以及确定偏差量已经收敛的函数。 当偏差量已经收敛时，终止坐标校正表达式优化的测量，并且根据计算的偏差量的收敛值来设定样本在视场内所必需的视场。
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