公开(公告)号：US08462285B2

公开(公告)日：2013-06-11

申请号：US12342215

申请日：2008-12-23

申请人： Isao Nojiri ,  Hiroyuki Murai ,  Takashi Miyayama

发明人： Isao Nojiri ,  Hiroyuki Murai ,  Takashi Miyayama

IPC分类号： G02F1/136

CPC分类号： G02F1/13454

摘要： A first contact hole formed in a gate driving circuit is covered with an electrically conductive oxide film formed to be connected to the first contact hole and having a first pattern. The periphery of the electrically conductive oxide film is surrounded by an electrically conductive oxide film (a sacrifice electrode) formed simultaneously with the electrically conductive oxide film and having a second pattern form.

摘要翻译： 形成在栅极驱动电路中的第一接触孔被形成为连接到第一接触孔并具有第一图案的导电氧化物膜覆盖。 导电氧化物膜的周围由与导电氧化物膜同时形成并具有第二图案形式的导电氧化物膜（牺牲电极）包围。

公开(公告)号：US08023610B2

公开(公告)日：2011-09-20

申请号：US11968470

申请日：2008-01-02

申请人： Takashi Miyayama ,  Youichi Tobita ,  Hiroyuki Murai ,  Seiichiro Mori

发明人： Takashi Miyayama ,  Youichi Tobita ,  Hiroyuki Murai ,  Seiichiro Mori

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A dual-gate transistor formed of two transistors connected in series between a first power terminal and a first node is used as a charging circuit for charging a gate node (first node) of a transistor intended to pull up an output terminal of a unit shift register. The dual-gate transistor is configured such that the connection node (second node) between the two transistors constituting the dual-gate transistor is pulled down to the L level by the capacitive coupling between the gate and second node in accordance with the change of the gate from the H level to the L level.

公开(公告)号：US20110122988A1

公开(公告)日：2011-05-26

申请号：US12929472

申请日：2011-01-27

申请人： Takashi Miyayama ,  Youichi Tobita ,  Hiroyuki Murai ,  Seiichiro Mori

发明人： Takashi Miyayama ,  Youichi Tobita ,  Hiroyuki Murai ,  Seiichiro Mori

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A dual-gate transistor formed of two transistors connected in series between a first power terminal and a first node is used as a charging circuit for charging a gate node (first node) of a transistor intended to pull up an output terminal of a unit shift register. The dual-gate transistor is configured such that the connection node (second node) between the two transistors constituting the dual-gate transistor is pulled down to the L level by the capacitive coupling between the gate and second node in accordance with the change of the gate from the H level to the L level.

摘要翻译： 由串联在第一电源端子和第一节点之间的两个晶体管形成的双栅极晶体管用作充电电路，用于对旨在上拉单元偏移的输出端子的晶体管的栅极节点（第一节点）充电 寄存器。 双栅极晶体管被配置为使得构成双栅极晶体管的两个晶体管之间的连接节点（第二节点）根据栅极和第二节点的变化被下拉到L电平 门从H级到L级。

公开(公告)号：US20090174695A1

公开(公告)日：2009-07-09

申请号：US12342215

申请日：2008-12-23

申请人： Isao Nojiri ,  Hiroyuki Murai ,  Takashi Miyayama

发明人： Isao Nojiri ,  Hiroyuki Murai ,  Takashi Miyayama

IPC分类号： G09G5/00

CPC分类号： G02F1/13454

摘要： A first contact hole formed in a gate driving circuit is covered with an electrically conductive oxide film formed to be connected to the first contact hole and having a first pattern. The periphery of the electrically conductive oxide film is surrounded by an electrically conductive oxide film (a sacrifice electrode) formed simultaneously with the electrically conductive oxide film and having a second pattern form.

摘要翻译： 形成在栅极驱动电路中的第一接触孔被形成为连接到第一接触孔并具有第一图案的导电氧化物膜覆盖。 导电氧化物膜的周围由与导电氧化物膜同时形成并具有第二图案形式的导电氧化物膜（牺牲电极）包围。

公开(公告)号：US20090026509A1

公开(公告)日：2009-01-29

申请号：US12115109

申请日：2008-05-05

申请人： Masami Hayashi ,  Takashi Miyayama ,  Hiroyuki Murai

发明人： Masami Hayashi ,  Takashi Miyayama ,  Hiroyuki Murai

IPC分类号： H01L31/113 ,  G01T1/24

CPC分类号： H01L31/022408 ,  H01L27/12 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/14658

摘要： For a photosensor, an array substrate is provided, wherein the edge of a photodiode is enclosed by the opening edge of a contact hole formed on a drain electrode.

摘要翻译： 对于光传感器，提供阵列基板，其中光电二极管的边缘由形成在漏电极上的接触孔的开口边缘包围。

公开(公告)号：US20080187089A1

公开(公告)日：2008-08-07

申请号：US11968470

申请日：2008-01-02

申请人： Takashi Miyayama ,  Youichi Tobita ,  Hiroyuki Murai ,  Seiichiro Mori

发明人： Takashi Miyayama ,  Youichi Tobita ,  Hiroyuki Murai ,  Seiichiro Mori

IPC分类号： G11C19/00 ,  H03L5/00

CPC分类号： G11C19/28

摘要： A dual-gate transistor formed of two transistors connected in series between a first power terminal and a first node is used as a charging circuit for charging a gate node (first node) of a transistor intended to pull up an output terminal of a unit shift register. The dual-gate transistor is configured such that the connection node (second node) between the two transistors constituting the dual-gate transistor is pulled down to the L level by the capacitive coupling between the gate and second node in accordance with the change of the gate from the H level to the L level.

摘要翻译： 由串联在第一电源端子和第一节点之间的两个晶体管形成的双栅极晶体管用作充电电路，用于对旨在上拉单元偏移的输出端子的晶体管的栅极节点（第一节点）充电 寄存器。 双栅极晶体管被配置为使得构成双栅极晶体管的两个晶体管之间的连接节点（第二节点）根据栅极和第二节点的变化被下拉到L电平 门从H级到L级。

公开(公告)号：US20090057564A1

公开(公告)日：2009-03-05

申请号：US12202628

申请日：2008-09-02

申请人： Takashi MIYAYAMA ,  Hiroyuki Murai

发明人： Takashi MIYAYAMA ,  Hiroyuki Murai

IPC分类号： G01T1/24 ,  H01L27/146

CPC分类号： H01L27/14663 ,  G01T1/241 ,  H01L27/14623 ,  H01L27/14632

摘要： A parasitic capacitance is reduced between a lower electrode of a photodiode and data line. A photosensor according to this invention includes a glass substrate; an underlying insulator which is provided on the glass substrate, and has a dielectric constant lower than that of the glass substrate; and a switching element which is formed by laminating a gate electrode, a gate insulating film, and a semiconductor layer on the underlying insulator, and includes a drain electrode connected to the semiconductor layer. The drain electrode has an extended portion which directly contacts a surface of the underlying insulator. The photosensor further includes a photodiode which is provided on the extended portion of the drain electrode.

摘要翻译： 在光电二极管的下电极和数据线之间的寄生电容减小。 根据本发明的光电传感器包括玻璃基板; 设置在玻璃基板上的下层绝缘体，其介电常数比玻璃基板的介电常数低; 以及通过在下面的绝缘体上层叠栅极，栅极绝缘膜和半导体层而形成的开关元件，并且包括连接到半导体层的漏电极。 漏电极具有直接接触下面的绝缘体的表面的延伸部分。 光电传感器还包括设置在漏电极的延伸部分上的光电二极管。

公开(公告)号：US08032051B2

公开(公告)日：2011-10-04

申请号：US12369253

申请日：2009-02-11

申请人： Toshiki Takiguchi ,  Hideshi Izumi ,  Takahiko Yoshida ,  Hiroyuki Murai

发明人： Toshiki Takiguchi ,  Hideshi Izumi ,  Takahiko Yoshida ,  Hiroyuki Murai

IPC分类号： G03G15/16 ,  G03G15/01

CPC分类号： G03G15/1615 ,  G03G15/161 ,  G03G15/162 ,  G03G2215/00151 ,  G03G2215/1661

摘要： A belt carrying device includes supporting rollers, an endless belt supported by the supporting rollers, and guiding members provided on the endless belt. The endless belt is rotated by rotation of the supporting rollers. An outer peripheral surface of the endless belt is in contact with a cleaning member. The guiding members are provided on those projecting areas of the endless belt, which project in an axial direction of the supporting rollers from both end surfaces of the supporting roller. A guiding member suppresses meandering of the endless belt by coming into contact with an end surface of the supporting roller. Formed on the end, surfaces of at least one of the supporting rollers are projecting sections and groove sections, which are rotated around a rotation axis of the at least one of the supporting rollers in response to rotation of the at least one of the supporting rollers.

摘要翻译： 带传送装置包括支撑辊，由支撑辊支撑的环形带以及设置在环形带上的引导构件。 环带通过支撑辊的旋转而旋转。 环形带的外周面与清洁部件接触。 引导构件设置在环形带的突出区域上，该环形带从支撑辊的两个端表面沿着支撑辊的轴向突出。 引导构件通过与支撑辊的端面接触而抑制环形带的曲折。 至少一个支撑辊的表面形成为至少一个支撑辊的表面是突出部分和槽部分，其响应于至少一个支撑辊的旋转而围绕至少一个支撑辊的旋转轴线旋转 。

公开(公告)号：US20110228893A1

公开(公告)日：2011-09-22

申请号：US13030578

申请日：2011-02-18

申请人： Youichi TOBITA ,  Hiroyuki Murai

发明人： Youichi TOBITA ,  Hiroyuki Murai

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3266 ,  G09G3/3674 ,  G09G2310/0286 ,  G09G2320/0252 ,  G11C19/184

摘要： A shift register circuit includes a first transistor which supplies a clock signal to an output terminal, and an inverter which drives a second transistor for discharging a gate of the first transistor. An input node of the inverter is separated from the gate of the first transistor, and the gates of the first and second transistors are charged and discharged by separate circuits, respectively.

摘要翻译： 移位寄存器电路包括向输出端提供时钟信号的第一晶体管和驱动用于对第一晶体管的栅极放电的第二晶体管的反相器。 反相器的输入节点与第一晶体管的栅极分离，并且第一和第二晶体管的栅极分别由分离的电路充电和放电。

公开(公告)号：US20110148954A1

公开(公告)日：2011-06-23

申请号：US12963069

申请日：2010-12-08

申请人： Youichi Tobita ,  Yoshifumi Doi ,  Hiroyuki Murai

发明人： Youichi Tobita ,  Yoshifumi Doi ,  Hiroyuki Murai

IPC分类号： G09G5/02

CPC分类号： G09G3/3688 ,  G09G2310/0281 ,  G09G2310/08

摘要： For an image display apparatus, cost reduction is enabled to prevent display errors while ensuring operational margin to prevent display errors even when the delay time of gate line driving signals is large. A source driver of a liquid-crystal display apparatus includes a data latch circuit for supplying display data to a decode circuit. A gate line inactivation transition detecting circuit detects inactivation of each of a plurality of gate lines and activates a detect signal for a certain period with that timing. The data latch circuit updates the held display data in response to activation of the detect signal.

摘要翻译： 对于图像显示装置，即使当栅极线驱动信号的延迟时间较大时，也可以降低成本，同时确保操作余量以防止显示错误。 液晶显示装置的源极驱动器包括用于向解码电路提供显示数据的数据锁存电路。 栅极线灭活转变检测电路检测多条栅极线中的每一条的失活，并在该定时激活一段时间的检测信号。 响应于检测信号的激活，数据锁存电路更新保持的显示数据。