Semiconductor integrated circuit, operating method of semiconductor integrated circuit, and debug system
    1.
    发明授权
    Semiconductor integrated circuit, operating method of semiconductor integrated circuit, and debug system 有权
    半导体集成电路,半导体集成电路的操作方法和调试系统

    公开(公告)号:US08595562B2

    公开(公告)日:2013-11-26

    申请号:US13014318

    申请日:2011-01-26

    IPC分类号: G06F11/00

    摘要: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information. A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.

    摘要翻译: 电流测量单元,测量在多个电路块中消耗的电源电流,其中至少一个电路块包括处理器,并输出测量结果作为电源电流值。 选择单元根据选择信息选择电源电流值中的至少一个。 顺序地保持由选择单元选择的电源电流值与跟随执行信息的跟踪缓冲器,并顺序地输出保持的信息。 通过根据选择信息选择调试所需的电路块的电源电流值,可以减少包括跟踪电源电流值的调试所需的半导体集成电路的外部端子的数量。 结果,可以减少具有调试功能的半导体集成电路的芯片尺寸。

    SEMICONDUCTOR INTEGRATED CIRCUIT, OPERATING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND DEBUG SYSTEM
    2.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT, OPERATING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND DEBUG SYSTEM 有权
    半导体集成电路,半导体集成电路的工作方法和调试系统

    公开(公告)号:US20110302456A1

    公开(公告)日:2011-12-08

    申请号:US13014318

    申请日:2011-01-26

    IPC分类号: G06F11/00 G06F19/00

    摘要: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information, A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.

    摘要翻译: 电流测量单元,测量在多个电路块中消耗的电源电流,其中至少一个电路块包括处理器,并输出测量结果作为电源电流值。 选择单元根据选择信息选择电源电流值中的至少一个,顺序地保持由选择单元选择的电源电流值以及处理器的执行信息的跟踪缓冲器,并且顺序地输出保持的信息。 通过根据选择信息选择调试所需的电路块的电源电流值,可以减少包括跟踪电源电流值的调试所需的半导体集成电路的外部端子的数量。 结果,可以减少具有调试功能的半导体集成电路的芯片尺寸。

    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
    3.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
    半导体器件的制造方法

    公开(公告)号:US20090215247A1

    公开(公告)日:2009-08-27

    申请号:US12434637

    申请日:2009-05-02

    IPC分类号: H01L21/304

    摘要: Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 μm or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced by a blade (4a) attached to a spindle (5), light is irradiated on an entire surface of an upper surface (element forming surface) of the wafer by the illumination devices (7a) and (7b). At this time, an illuminance of light on the wafer is set at 70 lux or more and 2000 lux or less. By this means, during a dicing operation, an area to be a light-shielded area by the spindle (5) or the like is not present on the wafer.

    摘要翻译: 在扫描装置(1)的盖(8)的前表面和后表面上布置照射波长为1.1μm以下的光的照明装置(7a)和(7b)。 在将晶片放置在切割台(3)上之后,当通过安装在主轴(5)上的刀片(4a)切割晶片时,将光照射在上表面(元件形成表面)的整个表面上 晶片通过照明装置(7a)和(7b)。 此时,晶片上的光的照度设定为70勒克司以上且2000lux以下。 通过这种方式,在切割操作期间,晶片上不存在由主轴(5)等构成遮光区域的区域。

    Light illumination during wafer dicing to prevent aluminum corrosion
    4.
    发明授权
    Light illumination during wafer dicing to prevent aluminum corrosion 有权
    晶圆切割时的光照,防止铝腐蚀

    公开(公告)号:US07998793B2

    公开(公告)日:2011-08-16

    申请号:US12434637

    申请日:2009-05-02

    IPC分类号: H01L21/00

    摘要: Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 μm or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced by a blade (4a) attached to a spindle (5), light is irradiated on an entire surface of an upper surface (element forming surface) of the wafer by the illumination devices (7a) and (7b). At this time, an illuminance of light on the wafer is set at 70 lux or more and 2000 lux or less. By this means, during a dicing operation, an area to be a light-shielded area by the spindle (5) or the like is not present on the wafer.

    摘要翻译: 在切割装置(1)的盖(8)的前表面和后表面上布置照射波长为1.1μm以下的光的照明装置(7a)和(7b)。 在将晶片放置在切割台(3)上之后,当通过安装在主轴(5)上的刀片(4a)切割晶片时,将光照射在上表面(元件形成表面)的整个表面上 晶片通过照明装置(7a)和(7b)。 此时,晶片上的光的照度设定为70勒克司以上且2000lux以下。 通过这种方式,在切割操作期间,晶片上不存在由主轴(5)等构成遮光区域的区域。

    Manufacturing Method of Semiconductor Device
    5.
    发明申请
    Manufacturing Method of Semiconductor Device 审中-公开
    半导体器件的制造方法

    公开(公告)号:US20080138962A1

    公开(公告)日:2008-06-12

    申请号:US11632993

    申请日:2004-07-22

    IPC分类号: H01L21/304

    摘要: Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 μm or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced by a blade (4a) attached to a spindle (5), light is irradiated on an entire surface of an upper surface (element forming surface) of the wafer by the illumination devices (7a) and (7b). At this time, an illuminance of light on the wafer is set at 70 lux or more and 2000 lux or less. By this means, during a dicing operation, an area to be a light-shielded area by the spindle (5) or the like is not present on the wafer.

    摘要翻译: 在切割装置(1)的盖(8)的前表面和后表面上布置照射具有1.1μm或更小的波长的光的照明装置(7a)和(7b)。 在将晶片放置在切割台(3)上之后,当通过安装在主轴(5)上的刀片(4a)切割晶片时,将光照射在上表面(元件形成表面)的整个表面上 通过照明装置(7a)和(7b)的晶片。 此时,晶片上的光的照度设定为70勒克司以上且2000lux以下。 通过这种方式,在切割操作期间,晶片上不存在由主轴(5)等构成遮光区域的区域。

    Containment vessel and nuclear power plant

    公开(公告)号:US09818495B2

    公开(公告)日:2017-11-14

    申请号:US13988966

    申请日:2011-09-14

    申请人: Takashi Sato

    发明人: Takashi Sato

    摘要: A containment vessel has an inner shell covering a reactor pressure vessel and an outer shell forming an outer well which is a gas-tight space covering the horizontal outer periphery of the inner shell. The inner shell has a first cylindrical side wall surrounding the horizontal periphery of the reactor pressure vessel, a containment vessel head which covers the upper part of the reactor pressure vessel, and a first top slab connecting in a gas-tight manner the periphery of the containment vessel head and the upper end of the first cylindrical side wall. The outer shell has a second cylindrical side wall surrounding the outer periphery of the first cylindrical side wall, and also has a second to slab connecting in a gas-tight manner the vicinity of the upper end of the second cylindrical side wall and the first cylindrical side wall.

    Power supply circuit and apparatus including the circuit

    公开(公告)号:US09653994B2

    公开(公告)日:2017-05-16

    申请号:US13215035

    申请日:2011-08-22

    IPC分类号: G01R31/00 H02M3/158 H02M1/36

    CPC分类号: H02M3/158 H02M1/36

    摘要: A power supply device supplying power to a device via a power line is provided, where the power supply device includes a first voltage generation unit configured to generate and supply a first direct voltage to the power line, a second voltage generation unit configured to generate and supply a second direct voltage lower than the first direct voltage to the power line, a measurement unit configured to measure a voltage of the power line, a control unit configured to control supply of the first direct voltage with the first voltage generation unit after starting supply of the second direct voltage with the second voltage generation unit, and a determination unit configured to determine a state of the power supply device based on the measured voltage and a first threshold value after starting the supply of the second direct voltage.

    Method for producing fuel cell electrode catalyst, fuel cell electrode catalyst, and uses thereof
    9.
    发明授权
    Method for producing fuel cell electrode catalyst, fuel cell electrode catalyst, and uses thereof 有权
    燃料电池用电极催化剂的制造方法,燃料电池用电极催化剂及其用途

    公开(公告)号:US09350025B2

    公开(公告)日:2016-05-24

    申请号:US13979305

    申请日:2011-08-09

    摘要: A method for producing a fuel cell electrode catalyst including a metal element selected from aluminum, chromium, manganese, iron, cobalt, nickel, copper, strontium, yttrium, tin, tungsten, and cerium and having high catalytic activity through heat treatment at comparatively low temperature. The method including: a step (1) of mixing at least a certain metal compound (1), a nitrogen-containing organic compound (2), and a solvent to obtain a catalyst precursor solution, a step (2) of removing the solvent from the catalyst precursor solution, and a step (3) of heat-treating a solid residue, obtained in the step (2), at a temperature of 500 to 1100° C. to obtain an electrode catalyst; a portion or the entirety of the metal compound (1) being a compound containing, as the metal element, a metal element M1 selected from aluminum, chromium, manganese, iron, cobalt, nickel, copper, strontium, yttrium, tin, tungsten, and cerium.

    摘要翻译: 一种生产包括选自铝,铬,锰,铁,钴,镍,铜,锶,钇,锡,钨和铈的金属元素的燃料电池电极催化剂的方法,并且通过相对较低的热处理具有高催化活性 温度。 该方法包括:将至少一种金属化合物(1),含氮有机化合物(2)和溶剂混合以获得催化剂前体溶液的步骤(1),除去溶剂的步骤(2) 和催化剂前体溶液的步骤(3)和步骤(2)中获得的固体残渣热处理步骤(3),在500〜1100℃的温度下进行,得到电极催化剂; 金属化合物(1)的一部分或全部是含有选自铝,铬,锰,铁,钴,镍,铜,锶,钇,锡,钨中的金属元素M1作为金属元素的化合物, 和铈。

    Method for manufacturing glass blank for magnetic disk, method for manufacturing glass substrate for magnetic disk
    10.
    发明授权
    Method for manufacturing glass blank for magnetic disk, method for manufacturing glass substrate for magnetic disk 有权
    磁盘用玻璃坯料的制造方法,磁盘用玻璃基板的制造方法

    公开(公告)号:US09336810B2

    公开(公告)日:2016-05-10

    申请号:US13982877

    申请日:2012-04-27

    IPC分类号: C03B11/12 G11B5/84 C03B11/08

    摘要: A method for manufacturing a glass substrate for magnetic disk is provided in which a glass is kept from being fused to a mold during press forming and shape processing to achieve a good circularity is efficiently performed. The method includes: a forming process of forming a disk-shaped glass blank by direct-pressing a molten glass by a pair of dies; and a shape processing process of performing at least one of inner hole formation and outer shape formation for forming a disk-shaped glass substrate by forming a cutting line on the principal face of the glass blank, followed by growing the cutting line to perform cutting. In the forming process, press forming is performed while the temperature of the pair of dies, over a period of time until a molten glass is separated from the die after coming into contact with the die, is set at a temperature lower than a glass transition point (Tg) and a mold release material is not attached to the surfaces of the pair of dies.

    摘要翻译: 提供一种用于制造用于磁盘的玻璃基板的方法,其中在压制成形期间保持玻璃不熔化到模具,并且有效地执行形状处理以实现良好的圆形度。 该方法包括:通过一对模具直接压制熔融玻璃来形成盘状玻璃坯料的成形过程; 以及通过在玻璃坯料的主面上形成切割线,进行用于形成圆盘状的玻璃基板的内孔形成和外形形成中的至少一种的形状加工工序,然后使切割线成长进行切削。 在成形过程中,一边进行压制成形,一边在与模具接触的熔融玻璃与模具分离一段时间的一段时间内,将其设定为低于玻璃化转变温度 点(Tg)和脱模材料未附接到该对模具的表面。