利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

177 条记录 (耗时 0.043 秒)

    High-frequency interpolation device and high-frequency interpolation method
    3.
    发明授权
    High-frequency interpolation device and high-frequency interpolation method 有权
    高频插补装置和高频插补方法

    公开(公告)号：US08554349B2

    公开(公告)日：2013-10-08

    申请号：US12680899

    申请日：2008-10-22

    申请人： Takeshi Hashimoto

    发明人： Takeshi Hashimoto

    IPC分类号： G06F17/00 ,  H03G5/00

    CPC分类号： G10L21/038

    摘要： It is possible to generate an interpolation signal in which spectrum in frequency characteristics develops in a continuous manner according to a reproduced music without increasing the sampling rate (sampling frequency) in up-sampling processing. A high-frequency interpolation device 1 includes: a frequency band determination section 2 that determines a bandwidth type of an audio signal as a frequency band determination value preset for each bandwidth according to the frequency characteristics of the audio signal; and an interpolation signal generation section 3 that selects a filter coefficient of a high-pass filter in accordance with the frequency band determination value 2, performs filtering for the audio signal by using the high-pass filter having the selected filter coefficient, and generates a high-frequency interpolation signal for the audio signal.

    摘要翻译： 可以生成内插信号，其中频率特性中的频谱根据再现的音乐以连续的方式发展，而不增加上采样处理中的采样率（采样频率）。 高频内插装置1包括：频带确定部分2，其根据音频信号的频率特性，将音频信号的带宽类型确定为针对每个带宽预设的频带确定值; 以及根据频带判定值2选择高通滤波器的滤波器系数的插值信号生成部3，通过使用具有选择的滤波器系数的高通滤波器对音频信号进行滤波，并生成 用于音频信号的高频插值信号。

    Method for preparing silicone rubber/fluoroelastomer integrated rubber article
    6.
    发明授权
    Method for preparing silicone rubber/fluoroelastomer integrated rubber article 有权
    硅橡胶/含氟弹性体一体化橡胶制品的制备方法

    公开(公告)号：US07879450B2

    公开(公告)日：2011-02-01

    申请号：US11711659

    申请日：2007-02-28

    申请人： Takashi Matsuda ,  Mikio Shiono ,  Takeshi Hashimoto

    发明人： Takashi Matsuda ,  Mikio Shiono ,  Takeshi Hashimoto

    IPC分类号： B32B9/04 ,  C08G77/24

    CPC分类号： F16J15/108 ,  C08J7/047 ,  C08J2383/04 ,  C08J2471/00 ,  Y10T428/31663

    摘要： A rubber article is manufactured by heat curing a heat-curable silicone rubber composition filled with untreated fumed silica to form a substrate, applying a primer composition comprising a fluoroalkylene or fluoropolyether compound having at least one alkenyl radical and at least one hydrolyzable silyl radical onto the substrate surface, and disposing a heat-curable perfluoropolyether elastomer composition thereon and curing the composition for integration. The integrally molded article has characteristics of both silicone rubber and fluoroelastomer.

    摘要翻译： 通过将填充有未处理的热解法二氧化硅的可热固化的硅橡胶组合物加热固化以形成基底来制造橡胶制品，将包含具有至少一个烯基的氟代亚烷基或含氟聚醚化合物的底漆组合物和至少一种可水解的甲硅烷基基团 底物表面，并在其上设置可热固化的全氟聚醚弹性体组合物，并固化该组合物用于整合。 一体成形品具有硅橡胶和含氟弹性体的特征。

    Semiconductor memory device and refresh period controlling method
    7.
    发明申请
    Semiconductor memory device and refresh period controlling method 审中-公开
    半导体存储器件和刷新周期控制方法

    公开(公告)号：US20090193301A1

    公开(公告)日：2009-07-30

    申请号：US12318840

    申请日：2009-01-09

    申请人： Yutaka Ito ,  Takeshi Hashimoto

    发明人： Yutaka Ito ,  Takeshi Hashimoto

    IPC分类号： H03M13/05 ,  G06F11/00 ,  G06F11/07

    CPC分类号： G11C11/406 ,  G11C2211/4061 ,  G11C2211/4062

    摘要： Disclosed is a memory device including an error rate measurement circuit and a control circuit. The error rate measurement circuit, carrying a BIST circuit, reads out and writes data for an area for monitor bits every refresh period to detect an error rate (error count) with the refresh period. The control circuit performs control for elongating and shortening the refresh period so that a desired error rate will be achieved. The BIST circuit issues an internal command and an internal address and drives the DRAM from inside. The BIST circuit writes and reads out desired data, compares the monitor bits to expected values (error decision) and counts the errors.

    摘要翻译： 公开了一种包括错误率测量电路和控制电路的存储器件。 携带BIST电路的误差率测量电路每刷新周期读出并写入用于监视位的区域的数据，以检测刷新周期的错误率（错误计数）。 控制电路进行用于延长和缩短刷新周期的控制，从而实现期望的误码率。 BIST电路发出内部命令和内部地址，并从内部驱动DRAM。 BIST电路写入和读出所需的数据，将监视位与预期值进行比较（错误判定），并对错误进行计数。

    IMAGING CARTRIDGE AND IMAGE FORMING APPARATUS
    8.
    发明申请
    IMAGING CARTRIDGE AND IMAGE FORMING APPARATUS 有权
    成像盒和图像形成装置

    公开(公告)号：US20090060570A1

    公开(公告)日：2009-03-05

    申请号：US12197628

    申请日：2008-08-25

    申请人： Hiroshi MIZUNO ,  Isamu Kugimiya ,  Takeshi Hashimoto ,  Naoto Yoshida ,  Nozomu Kondo

    发明人： Hiroshi MIZUNO ,  Isamu Kugimiya ,  Takeshi Hashimoto ,  Naoto Yoshida ,  Nozomu Kondo

    IPC分类号： G03G21/18

    CPC分类号： G03G21/12 ,  G03G15/0868 ,  G03G15/0875 ,  G03G15/0886 ,  G03G21/1814 ,  G03G21/1821 ,  G03G2215/0692 ,  G03G2221/1624 ,  G03G2221/1648 ,  G03G2221/1654

    摘要： An imaging cartridge has a process unit and a toner box unit formed by integrating a new toner box and a waste toner box. The toner box unit is attachable to and detachable from the process unit. Shutters which open and close a connecting section between the new toner box and a developing device included in the process unit can be opened by manual operation when the toner box unit is attached to the process unit. Shutters and which open and close a connecting section between a cleaning device included in the process unit and the waste toner box are opened when the imaging cartridge is in the process of being moved to a prescribed position in an apparatus body.

    摘要翻译： 成像盒具有通过集成新的调色剂盒和废粉盒形成的处理单元和调色剂盒单元。 调色剂盒单元可附接到处理单元并可从处理单元拆卸。 当调色剂盒单元附接到处理单元时，可以通过手动操作来打开和关闭在新的调色剂盒和包含在处理单元中的显影装置之间的连接部分的快门。 当成像盒正在移动到装置主体中的规定位置的过程中时，打开和关闭在处理单元中包括的清洁装置和废粉盒之间的连接部分的打开。

    Semiconductor memory device and refresh period controlling method
    9.
    发明授权
    Semiconductor memory device and refresh period controlling method 失效

    公开(公告)号：US07493531B2

    公开(公告)日：2009-02-17

    申请号：US11152762

    申请日：2005-06-15

    申请人： Yutaka Ito ,  Takeshi Hashimoto

    发明人： Yutaka Ito ,  Takeshi Hashimoto

    IPC分类号： G06F11/00 ,  H03M13/00

    CPC分类号： G11C11/406 ,  G11C2211/4061 ,  G11C2211/4062

    摘要： Disclosed is a memory device including an error rate measurement circuit and a control circuit. The error rate measurement circuit, carrying a BIST circuit, reads out and writes data for an area for monitor bits every refresh period to detect an error rate (error count) with the refresh period. The control circuit performs control for elongating and shortening the refresh period so that a desired error rate will be achieved. The BIST circuit issues an internal command and an internal address and drives the DRAM from inside. The BIST circuit writes and reads out desired data, compares the monitor bits to expected values (error decision) and counts the errors.