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    Information processor and control network system
    3.
    发明授权
    Information processor and control network system 有权
    信息处理器和控制网络系统

    公开(公告)号：US09148297B2

    公开(公告)日：2015-09-29

    申请号：US13030272

    申请日：2011-02-18

    申请人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Norihisa Yanagihara ,  Shinji Yonemoto ,  Takashi Iwaki ,  Hironori Ohashi ,  Yutaka Matsumoto

    发明人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Norihisa Yanagihara ,  Shinji Yonemoto ,  Takashi Iwaki ,  Hironori Ohashi ,  Yutaka Matsumoto

    IPC分类号： G01R31/08 ,  H04L12/40 ,  H04L12/413 ,  H04L12/437

    CPC分类号： H04L12/40176 ,  H04L12/413 ,  H04L12/437

    摘要： An information processor capable of ensuring time synchronization accuracy, ensuring EtherCAT command consistency, and easily developing the software based on a 2-port configuration even when a communication path error occurs includes: an arithmetic section; at least two communication sections each including a transmission section and a reception section; and a redundant communication control section that controls a communication path between the arithmetic section and the communication section. The redundant communication control section includes: a communication path state determination section that determines a network path state; and a redundant path switching section that switches connection between the arithmetic section and at least two communication sections.

    摘要翻译： 一种信息处理器，能够确保时间同步精度，确保EtherCAT命令一致性，并且即使发生通信路径错误，也可以容易地开发基于2端口配置的软件，包括：运算部分; 至少两个通信部分，每个通信部分包括传输部分和接收部分; 以及控制运算部和通信部之间的通信路径的冗余通信控制部。 冗余通信控制部分包括：通信路径状态确定部分，其确定网络路径状态; 以及冗余路径切换部，切换运算部与至少两个通信部之间的连接。

    Communication control unit and communication control system
    4.
    发明授权
    Communication control unit and communication control system 有权
    通讯控制单元及通讯控制系统

    公开(公告)号：US08913514B2

    公开(公告)日：2014-12-16

    申请号：US13213545

    申请日：2011-08-19

    申请人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Shinji Yonemoto ,  Takashi Iwaki ,  Hironori Ohashi ,  Yutaka Matsumoto

    发明人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Shinji Yonemoto ,  Takashi Iwaki ,  Hironori Ohashi ,  Yutaka Matsumoto

    IPC分类号： H04J1/16 ,  H04J3/14 ,  H04L12/26 ,  H04L12/28 ,  G05B19/418 ,  H04L12/413 ,  H04J3/06 ,  G06F1/12

    CPC分类号： H04L12/413 ,  G05B19/4185 ,  H04J3/0667 ,  Y02P90/18

    摘要： A communication control unit and a communication control system are provided in which control devices can synchronously operate. In a communication control system in which a communication control unit and multiple control devices having an actuator to operate a control target are connected via a network, the communication control unit provides a control command to the control devices, synchronizes times of the communication control unit and the control devices, obtains communication delays relative to the control devices, collects control start times of the control devices, obtains a time by subtracting the control start time from a predetermined time as a start time of the control device, calculates a time obtained by subtracting the communication delay from the start time for each control device, and transmits the control command to the control devices before the earliest time of the calculated times.

    摘要翻译： 提供通信控制单元和通信控制系统，其中控制装置可以同步操作。 在其中通信控制单元和具有用于操作控制目标的致动器的多个控制装置经由网络连接的通信控制系统中，通信控制单元向控制设备提供控制命令，同步通信控制单元的时间和 控制装置获得相对于控制装置的通信延迟，收集控制装置的控制开始时间，通过从预定时间减去控制开始时间获取时间作为控制装置的开始时间，计算通过减去 从每个控制装置的开始时间起的通信延迟，并且在所计算的时间的最早时间之前将控制命令发送到控制装置。

    INFORMATION PROCESSOR AND CONTROL NETWORK SYSTEM
    5.
    发明申请
    INFORMATION PROCESSOR AND CONTROL NETWORK SYSTEM 有权
    信息处理器和控制网络系统

    公开(公告)号：US20110205886A1

    公开(公告)日：2011-08-25

    申请号：US13030272

    申请日：2011-02-18

    申请人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Norihisa Yanagihara ,  Shinji Yonemoto ,  Takashi Iwaki ,  Hironori Ohashi ,  Yutaka Matsumoto

    发明人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Norihisa Yanagihara ,  Shinji Yonemoto ,  Takashi Iwaki ,  Hironori Ohashi ,  Yutaka Matsumoto

    IPC分类号： H04L1/00

    CPC分类号： H04L12/40176 ,  H04L12/413 ,  H04L12/437

    摘要： An information processor capable of ensuring time synchronization accuracy, ensuring EtherCAT command consistency, and easily developing the software based on a 2-port configuration even when a communication path error occurs includes: an arithmetic section; at least two communication sections each including a transmission section and a reception section; and a redundant communication control section that controls a communication path between the arithmetic section and the communication section. The redundant communication control section includes: a communication path state determination section that determines a network path state; and a redundant path switching section that switches connection between the arithmetic section and at least two communication sections. The network provides a logical ring topology for a packet communication path. The redundant path switching section functions based on the communication path state determined by the communication path state determination section and changes a connection path between the communication sections and a communication path between the communication section and the arithmetic section.

    摘要翻译： 一种信息处理器，能够确保时间同步精度，确保EtherCAT命令一致性，并且即使发生通信路径错误，也可以容易地开发基于2端口配置的软件，包括：运算部分; 至少两个通信部分，每个通信部分包括传输部分和接收部分; 以及控制运算部和通信部之间的通信路径的冗余通信控制部。 冗余通信控制部分包括：通信路径状态确定部分，其确定网络路径状态; 以及冗余路径切换部，切换运算部与至少两个通信部之间的连接。 网络为分组通信路径提供逻辑环形拓扑。 冗余路径切换部基于由通信路径状态判定部确定的通信路径状态起作用，并且改变通信部之间的连接路径与通信部与运算部之间的通信路径。

    Storage control device and data processing system
    8.
    发明授权
    Storage control device and data processing system 有权
    存储控制装置和数据处理系统

    公开(公告)号：US08423741B2

    公开(公告)日：2013-04-16

    申请号：US13191631

    申请日：2011-07-27

    申请人： Masaya Suehiro ,  Tatsuya Maruyama ,  Tsutomu Yamada ,  Hideaki Suzuki

    发明人： Masaya Suehiro ,  Tatsuya Maruyama ,  Tsutomu Yamada ,  Hideaki Suzuki

    IPC分类号： G06F12/00

    CPC分类号： G06F3/0613 ,  G06F3/0652 ,  G06F3/0674

    摘要： A storage medium management part includes a stored data amount adjustment part that: stores a maximum data amount which the storage medium can store at the time of startup of a storage control device, and a stored data amount which is an initial stored amount, in a data amount storage part; upon receiving a write amount of a data in response to a write request, writes a new stored data amount calculated by adding the write amount to the already stored data amount, over the already stored data amount; calculates a free space by subtracting the stored data amount from the maximum data amount; determines a deletion amount of the data if the free space does not takes a value not less than a prescribed value; and writes a newly-calculated stored data amount calculated by subtracting the deletion amount from the stored data amount, over the stored data amount.

    摘要翻译： 存储介质管理部分包括存储数据量调整部分，其存储在存储控制装置启动时存储介质可以存储的最大数据量以及作为初始存储量的存储数据量，在 数据量存储部分; 在接收到写入请求后的数据写入量的情况下，通过将已经存储的数据量加上写入量而计算出的新的存储数据量超过已经存储的数据量; 通过从最大数据量减去所存储的数据量来计算可用空间; 如果可用空间不具有不小于规定值的值，则确定数据的删除量; 并且通过从所存储的数据量中减去所述删除量而计算的新计算的存储数据量超过所存储的数据量。

    Computer system
    9.
    发明授权
    Computer system 失效
    电脑系统

    公开(公告)号：US07716405B2

    公开(公告)日：2010-05-11

    申请号：US11599383

    申请日：2006-11-15

    申请人： Tsutomu Yamada ,  Hiromichi Endoh ,  Noritaka Matsumoto ,  Satoru Funaki ,  Tatsuya Maruyama ,  Atsushi Ito ,  Fumiyuki Tamura ,  Norihisa Yanagihara ,  Makiko Naemura

    发明人： Tsutomu Yamada ,  Hiromichi Endoh ,  Noritaka Matsumoto ,  Satoru Funaki ,  Tatsuya Maruyama ,  Atsushi Ito ,  Fumiyuki Tamura ,  Norihisa Yanagihara ,  Makiko Naemura

    IPC分类号： G06F13/36

    CPC分类号： G06F13/37

    摘要： A computer system, being a stack bus system in which a plurality of computer modules are stacked and connected to one another and being capable of automatically matching and allocating bus resources such as clocks and interrupts, is provided. In the computer system including one system module and n peripheral modules, each peripheral module includes an interrupt selector, a clock selector, an arbitration signal selector, a resource decision unit, and a position identification unit. The position identification unit cooperates with a position configuration unit present in the system module to identify a position of the module, which includes the position identification unit, in the computer system, and autonomously decides bus resources used by the module. By allowing the interrupt selector, the clock selector, and the arbitration signal selector to select and use the decided bus resources, each peripheral module can match and configure the bus resources in the computer system.

    摘要翻译： 一种作为堆叠总线系统的计算机系统，其中多个计算机模块彼此堆叠并彼此连接并且能够自动匹配和分配诸如时钟和中断的总线资源。 在包括一个系统模块和n个外围模块的计算机系统中，每个外围模块包括中断选择器，时钟选择器，仲裁信号选择器，资源判定单元和位置识别单元。 所述位置识别单元与存在于所述系统模块中的位置配置单元配合，以在所述计算机系统中识别包括所述位置识别单元的模块的位置，并且自主地决定所述模块使用的总线资源。 通过允许中断选择器，时钟选择器和仲裁信号选择器来选择和使用所决定的总线资源，每个外围模块可以匹配和配置计算机系统中的总线资源。

    INFORMATION PROCESSOR AND INFORMATION PROCESSING SYSTEM
    10.
    发明申请
    INFORMATION PROCESSOR AND INFORMATION PROCESSING SYSTEM 有权
    信息处理器和信息处理系统

    公开(公告)号：US20080195732A1

    公开(公告)日：2008-08-14

    申请号：US12019231

    申请日：2008-01-24

    申请人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Hideaki Suzuki ,  Norihisa Yanagihara ,  Makiko Naemura

    发明人： Tatsuya Maruyama ,  Tsutomu Yamada ,  Hideaki Suzuki ,  Norihisa Yanagihara ,  Makiko Naemura

    IPC分类号： G06F15/173

    CPC分类号： H04L67/325 ,  H04L12/2818 ,  H04L12/2856 ,  H04L29/06 ,  H04L43/00 ,  H04L63/1458 ,  H04L69/40

    摘要： An information processor disclosed herein prevents adverse impacts on higher priority processing due to extremely frequent receive processing when inbound traffic from a network is over-traffic state (under a DoS attack). The information processor attached to a network collects information about traffic state and, if it is determined that over-traffic state is present, deactivates the communication processing function without passing an interrupt request due to communication to the data processing block. In this state, the information processor continues to collect information about traffic state and, when it is determined that over-traffic state has terminated, starts to transfer an interrupt request to the data processing block and makes the communication processing function recover.

    摘要翻译： 本文所公开的信息处理器防止由于来自网络的入站业务超出业务状态（在DoS攻击下）时极端频繁的接收处理对较高优先级处理的不利影响。 附加到网络的信息处理器收集关于流量状态的信息，并且如果确定存在过流量状态，则由于与数据处理块的通信而不通过中断请求而停止通信处理功能。 在这种状态下，信息处理器继续收集关于业务状态的信息，并且当确定过流量状态已经终止时，开始将中断请求传送到数据处理块，并使通信处理功能恢复。