Integrated communication link testing

    公开(公告)号:US11789070B2

    公开(公告)日:2023-10-17

    申请号:US17324007

    申请日:2021-05-18

    CPC classification number: G01R31/3171 G01R31/2841 G01R31/3187 G01R31/31905

    Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

    SPLIT FREQUENCY BAND SIGNAL PATHS FOR SIGNAL SOURCES

    公开(公告)号:US20200212945A1

    公开(公告)日:2020-07-02

    申请号:US16588580

    申请日:2019-09-30

    Abstract: A signal generator device includes a digital signal waveform generator to produce a digital signal waveform, a first frequency band signal path having a first frequency band filter to receive the digital signal waveform and to pass first frequency band components of the digital signal waveform, and a first digital-to-analog converter to receive the first frequency band components of the digital signal waveform and to produce a first frequency band analog signal, a second frequency band signal path having a second frequency band filter to receive the digital signal waveform and to pass second frequency band components of the digital signal waveform, a second digital-to-analog converter to receive the second frequency band components of the digital signal waveform and to produce a second frequency band analog signal, and a combining element to combine the first frequency band analog signal and the second frequency band analog signal to produce a wideband analog signal. A method of generating a wideband analog signal includes generating a digital waveform, splitting the digital waveform into at least a first frequency band signal and a second frequency band signal, converting the first frequency band signal into a first frequency band analog signal, converting the second frequency band signal into a second frequency analog signal, and combining the first frequency band analog signal with the second frequency band analog signal to produce the wideband analog signal.

    Dual output signal paths for signal source channels to optimize for bandwidth and amplitude range

    公开(公告)号:US11005492B2

    公开(公告)日:2021-05-11

    申请号:US16588613

    申请日:2019-09-30

    Abstract: A signal source device includes at least one digital-to-analog converter, at least one connector, a first output path from the at least one digital-to-analog converter to the at least one connector, and a second output path from the at least one digital-to-analog converter to the at least one connector. A method of generating a analog signal includes generating at least one analog signal from at least one digital-to-analog converter, transmitting a first analog signal of the at least one analog signal along a first output path from the at least one digital-to-analog converter to at least one connector, and transmitting a second analog signal of the at least one analog signal along a second output path from the at least one digital-to-analog converter to the at least one connector.

    INTEGRATED COMMUNICATION LINK TESTING
    5.
    发明公开

    公开(公告)号:US20240044975A1

    公开(公告)日:2024-02-08

    申请号:US18488936

    申请日:2023-10-17

    CPC classification number: G01R31/3171 G01R31/2841 G01R31/3187 G01R31/31905

    Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

    Integrated communication link testing

    公开(公告)号:US11009546B2

    公开(公告)日:2021-05-18

    申请号:US16440944

    申请日:2019-06-13

    Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

    Linear and Non-Linear Calibration for Time Interleaved Digital-to-Analog Converter

    公开(公告)号:US20200212922A1

    公开(公告)日:2020-07-02

    申请号:US16526875

    申请日:2019-07-30

    Abstract: A time-interleaved digital-to-analog converter system, comprising a digital pre-distorter configured to receive an input digital signal and an error signal and output a distorted digital signal based on the input digital signal and the error signal; a time-interleaved digital-to-analog converter having a first sample rate, the time-interleaved digital-to-analog converter configured to convert the distorted digital signal to an analog signal; and a calibration system. The calibration system includes an analog-to-digital converter having a second sample rate equal to or lower than the first sample rate, the analog-to-digital converter configured to receive the analog signal and covert the analog signal to a down-sampled digital signal, a discrete-time linear model configured to receive the input digital signal and the error signal and output a model signal, and a combiner to subtract the down-sampled digital signal from the model signal to generate the error signal.

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