Personal device activation and unlocking using gaze tracking

    公开(公告)号:US12026307B2

    公开(公告)日:2024-07-02

    申请号:US17924797

    申请日:2020-05-19

    摘要: A method (200) of activating a display screen of a device, includes establishing (201) a connection with each of one or more candidate display screens (119). A direction of gaze (121) of an eye of a user (117) is tracked (203), and a display screen (119) is selected (207) from the one or more candidate display screens when (205) the display screen (119) is in the direction of gaze (121) of the eye of the user (117). A confirmation code (305) is caused (209) to be displayed on the selected display screen and an image of the selected display screen is obtained. The selected display screen is activated (215) in response to detecting (213) the confirmation code (305) in the updated image of the selected display screen.

    Camera in Display
    5.
    发明申请

    公开(公告)号:US20210367006A1

    公开(公告)日:2021-11-25

    申请号:US16878235

    申请日:2020-05-19

    摘要: A display with both sensing diodes and emitting diodes constructed on a common backplane, where each sensing diode includes a lens having a focal length configured for a particular imaging distance from the display is presented herein. The sensing diodes may be used to detect environmental characteristics, e.g., light levels, presence of a user, etc., where the sensing and/or emitting diodes are then configured responsive to the detected environmental characteristics.

    Apparatus and Method for Simultaneous Multithreaded Instruction Scheduling in a Microprocessor

    公开(公告)号:US20230385065A1

    公开(公告)日:2023-11-30

    申请号:US18031070

    申请日:2020-10-14

    IPC分类号: G06F9/38 G06F9/48

    摘要: Techniques disclosed herein provide, among other things, advantageous mechanisms for detecting and resolving resource monopolization by one or more “slower” instruction threads in an instruction pipeline of a microprocessor that supports Simultaneous Multi-Threading (SMT). One or more embodiments involve updating thread rankings, e.g., from slowest to fastest, on an instruction cycle basis, and redirecting instructions from at least a slowest one of the threads, to bypass one or more shared resources that would otherwise be monopolized by instructions in the slower/slowest threads. In at least one embodiment, bypassing includes redirecting selected instructions away from more critical shared resources to lower-cost or lower-power secondary resources, for example bypassing an instruction queue in favor of a less complex buffer circuit.