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    Signal processing apparatus and a data recording and reproducing apparatus including local memory processor
    3.
    发明授权
    Signal processing apparatus and a data recording and reproducing apparatus including local memory processor 有权
    信号处理装置和包括本地存储处理器的数据记录和再现装置

    公开(公告)号：US08117518B2

    公开(公告)日：2012-02-14

    申请号：US12003270

    申请日：2007-12-21

    申请人： Terumi Takashi ,  Seiichi Mita ,  Atsushi Saito

    发明人： Terumi Takashi ,  Seiichi Mita ,  Atsushi Saito

    IPC分类号： G06F11/00

    CPC分类号： G11B20/10009 ,  G11B20/00086 ,  G11B20/10055 ,  G11B20/10074 ,  G11B20/10481 ,  G11B20/18 ,  G11B2020/10638 ,  G11B2020/183

    摘要： In a data recovery processing, the conventional overhead, primarily, latency due to a rotational recording media is removed. Secondary, in a signal processing or in a recording and reproducing apparatus, reliability of data reproduction is improved by repeatedly processing data. These processing are achieved that input signal, i.e., raw analog signal read from the recording media is digitized to be stored in a secondary storage such as a memory or a FIFO memory. The apparatus includes a signal processing circuit to repeatedly process the stored digital signal in the secondary storage. When detecting data, operation of the circuit is efficiently controlled by a change over detector parameters, in which characteristics for the detecting performance. Resultantly, data recovery processing speed is increased and reliability of data reproduced is improved.

    摘要翻译： 在数据恢复处理中，传统的开销，主要是由旋转记录介质引起的等待时间被去除。 在信号处理或记录和再现装置中，通过重复处理数据来提高数据再现的可靠性。 实现这些处理，即将从记录介质读取的原始模拟信号的输入信号数字化以存储在诸如存储器或FIFO存储器的辅助存储器中。 该装置包括信号处理电路，用于重复处理二次存储器中存储的数字信号。 当检测到数据时，通过改变检测器参数来有效地控制电路的操作，其中检测性能的特性。 从而提高数据恢复处理速度，提高数据再现的可靠性。

    Signal processing apparatus and a data recording and reproducing apparatus including local memory processor
    5.
    发明授权
    Signal processing apparatus and a data recording and reproducing apparatus including local memory processor 失效
    信号处理装置和包括本地存储处理器的数据记录和再现装置

    公开(公告)号：US07334165B2

    公开(公告)日：2008-02-19

    申请号：US11272837

    申请日：2005-11-15

    申请人： Terumi Takashi ,  Seiichi Mita ,  Atsushi Saito

    发明人： Terumi Takashi ,  Seiichi Mita ,  Atsushi Saito

    IPC分类号： G06F11/00

    CPC分类号： G11B20/10009 ,  G11B20/00086 ,  G11B20/10055 ,  G11B20/10074 ,  G11B20/10481 ,  G11B20/18 ,  G11B2020/10638 ,  G11B2020/183

    摘要： In a data recovery processing, the conventional overhead, primarily, latency due to a rotational recording media is removed. Secondary, in a signal processing or in a recording and reproducing apparatus, reliability of data reproduction is improved by repeatedly processing data. These processing are achieved that input signal, i.e., raw analog signal read from the recording media is digitized to be stored in a secondary storage such as a memory or a FIFO memory. The apparatus includes a signal processing circuit to repeatedly process the stored digital signal in the secondary storage. When detecting data, operation of the circuit is efficiently controlled by a change over detector parameters, in which characteristics for the detecting performance. Resultantly, data recovery processing speed is increased and reliability of data reproduced is improved.

    摘要翻译： 在数据恢复处理中，传统的开销，主要是由旋转记录介质引起的等待时间被去除。 在信号处理或记录和再现装置中，通过重复处理数据来提高数据再现的可靠性。 实现这些处理，即将从记录介质读取的原始模拟信号的输入信号数字化以存储在诸如存储器或FIFO存储器的辅助存储器中。 该装置包括信号处理电路，用于重复处理二次存储器中存储的数字信号。 当检测到数据时，通过改变检测器参数来有效地控制电路的操作，其中检测性能的特性。 从而提高数据恢复处理速度，提高数据再现的可靠性。

    Signal processing method and signal processing circuit
    7.
    发明授权
    Signal processing method and signal processing circuit 有权
    信号处理方法和信号处理电路

    公开(公告)号：US07296215B2

    公开(公告)日：2007-11-13

    申请号：US10922227

    申请日：2004-08-18

    申请人： Morishi Izumita ,  Terumi Takashi ,  Hideki Sawaguchi ,  Seiichi Mita

    发明人： Morishi Izumita ,  Terumi Takashi ,  Hideki Sawaguchi ,  Seiichi Mita

    IPC分类号： H03M13/03

    CPC分类号： H03M13/29 ,  G11B20/10009 ,  H03M13/1111 ,  H03M13/1191 ,  H03M13/1515 ,  H03M13/2703 ,  H03M13/3746 ,  H03M13/45 ,  H03M13/6343 ,  H03M13/6505

    摘要： In one embodiment, a symbol error correction encoder effects block interleaving on recording data and thereafter performs first error correction encoding on the recording data. Next, a symbol error correction encoder performs encoding on the whole block. A reproducing processing circuit outputs likelihood information of respective bits. A first error correction decoder corrects a random error produced upon recording and reproduction, using the likelihood information. Since it is possible to make an improvement in performance with respect to the random error by repetitive decoding at this time, the post-correction data is returned to the reproducing processing circuit. After the completion of such repetitive processing, the data is digitized and subjected to an error correction in symbol unit by a hard determination, and outputted to a symbol error correction decoder.

    摘要翻译： 在一个实施例中，符号纠错编码器对记录数据执行块交织，并且此后对记录数据执行第一纠错编码。 接下来，符号纠错编码器对整个块执行编码。 再现处理电路输出各位的似然信息。 第一纠错解码器使用似然信息校正记录和再现时产生的随机误差。 由于此时可以通过重复解码对随机误差进行性能改善，所以后校正数据返回到再生处理电路。 在完成这样的重复处理之后，数据被数字化，并通过硬判断进行符号单位的纠错，并将其输出到符号纠错解码器。

    Information recording and reproducing apparatus
    8.
    发明授权
    Information recording and reproducing apparatus 失效
    信息记录和再现装置

    公开(公告)号：US06731441B2

    公开(公告)日：2004-05-04

    申请号：US10214599

    申请日：2002-08-09

    申请人： Hideaki Maeda ,  Morishi Izumita ,  Terumi Takashi ,  Seiichi Mita

    发明人： Hideaki Maeda ,  Morishi Izumita ,  Terumi Takashi ,  Seiichi Mita

    IPC分类号： G11B2006

    CPC分类号： G11B20/1403 ,  G11B20/10009

    摘要： Here is disclosed an information recording and reproducing apparatus comprising a multi-phase quadrature angular modulator for subjecting a signal to be written on a recording medium to multi-phase quadrature angular modulation to generate a modulated signal expressing information in phase difference and frequency difference, a quantizer for generating a discrete signal by making discrete the amplitude of the modulated signal generated by the quadrature angular modulator with reference to a certain level, a write head for writing the output signal of the quantizer onto the recording medium, a read head for reading information written on the recording medium, a read compensate circuit for compensating the phase and amplitude of a signal readout of the read head, and a multi-phase quadrature angular demodulator for demodulating a signal supplied from the read compensate circuit by subjecting it to multi-phase quadrature angular demodulation. By expressing information to be recorded in phase difference or frequency difference, it is made possible to record or reproduce the information at the varying timing of amplitude, and the bit inversion interval can be controlled by regulating the timing of amplitude variation.

    摘要翻译： 这里公开了一种信息记录和再现装置，包括一个多相正交角度调制器，用于使信号被写入记录介质以进行多相正交角度调制以产生表示相位差和频差的信息的调制信号， 量化器，用于通过使由正交角调制器产生的调制信号的幅度相对于一定电平离散来产生离散信号，用于将量化器的输出信号写入记录介质的写入头，用于读取信息的读取头 写在记录介质上的读取补偿电路，用于补偿读取头的信号读出的相位和幅度的读取补偿电路;以及多相正交角解调器，用于对从读取的补偿电路提供的信号进行多相 正交角解调。 通过表示要以相位差或频率差记录的信息，可以在变化的幅度定时记录或再现信息，并且可以通过调节幅度变化的定时来控制位反转间隔。

    Information recording/reproduction method and apparatus using EPRML connection processing system using concatenated demodulators
    9.
    发明授权
    Information recording/reproduction method and apparatus using EPRML connection processing system using concatenated demodulators 失效
    使用连接解调器的EPRML连接处理系统的信息记录/再现方法和装置

    公开(公告)号：US06069856A

    公开(公告)日：2000-05-30

    申请号：US975670

    申请日：1997-11-28

    申请人： Seiichi Mita ,  Terumi Takashi ,  Naoki Satoh

    发明人： Seiichi Mita ,  Terumi Takashi ,  Naoki Satoh

    IPC分类号： G11B20/14 ,  G11B5/012 ,  G11B5/09 ,  G11B20/10 ,  G11B20/18 ,  G11B7/005

    CPC分类号： G11B20/10009 ,  G11B5/012 ,  G11B5/09

    摘要： An information recording/reproducing apparatus includes first and second data demodulators having different data discriminating capabilities. The first data demodulator has a lower data discriminating capability and the second data demodulator has a higher data discriminating capability. When the reliability of reliability information for demodulation data generated by the first data demodulator, the second data demodulator is operated so that demodulation data generated by the first data demodulator is replaced by demodulation data generated by the second data demodulator during a period of time when the reliability of the reliability information is deteriorated.

    摘要翻译： 信息记录/再现装置包括具有不同数据鉴别能力的第一和第二数据解调器。 第一数据解调器具有较低的数据鉴别能力，第二数据解调器具有较高的数据识别能力。 当由第一数据解调器产生的解调数据的可靠性信息的可靠性操作时，第二数据解调器被操作，使得由第一数据解调器产生的解调数据被第二数据解调器产生的解调数据替换为在第 可靠性信息的可靠性恶化。

    Reproduced signal processing method, reproduced signal processing circuit, and a magnetic storage apparatus
    10.
    发明授权
    Reproduced signal processing method, reproduced signal processing circuit, and a magnetic storage apparatus 有权
    再现信号处理方法，再现信号处理电路和磁存储装置

    公开(公告)号：US6104331A

    公开(公告)日：2000-08-15

    申请号：US161734

    申请日：1998-09-29

    申请人： Yoshiteru Ishida ,  Naoki Satoh ,  Terumi Takashi ,  Akihiko Hirano ,  Seiichi Mita

    发明人： Yoshiteru Ishida ,  Naoki Satoh ,  Terumi Takashi ,  Akihiko Hirano ,  Seiichi Mita

    IPC分类号： G11B5/09 ,  G11B5/012 ,  G11B19/04 ,  G11B20/10 ,  G11B20/24 ,  G11B23/00 ,  H03M1/12 ,  G11B5/02

    CPC分类号： G11B19/04 ,  G11B20/10009 ,  G11B20/24 ,  G11B5/012 ,  G11B23/0007 ,  G11B5/09

    摘要： A reproduced signal processing circuit includes a variable gain amplifier to which a signal read from a medium by a reproducing head is inputted; an analog-to-digital converter for converting a signal outputted from the variable gain amplifier into a digital signal; and a variable frequency oscillator for supplying an operation clock signal to the analog-to-digital converter. A reproduced signal processing method includes the steps of operating a first control loop for controlling the variable gain amplifier; operating at least either one of a second control loop and a third control loop, the second control loop controlling the variable frequency oscillator, the third control loop controlling the variable frequency oscillator; filtering by analog filter means the read signal inputted to the variable gain amplifier; operating at least one of first, second, and third noise detecting operations, the first noise detecting operation detecting presence or absence of a noise by comparing an amplitude of the output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting operation detecting a noise during an operation period of the second control loop, the third noise detecting operation detecting a noise during an operation period of the third control loop; and changing the range of cutoff frequency of the analog filter means in accordance with a result from at least one of the first, second, and third noise detecting operations, thereby controlling at least one of the first, second, and third control loops.

    摘要翻译： 再现信号处理电路包括可变增益放大器，从再现头从介质读取的信号被输入到该可变增益放大器; 用于将从可变增益放大器输出的信号转换为数字信号的模拟 - 数字转换器; 以及用于向模数转换器提供操作时钟信号的可变频率振荡器。 再现信号处理方法包括以下步骤：操作用于控制可变增益放大器的第一控制环路; 操作第二控制回路和第三控制回路中的至少一个，控制可变频率振荡器的第二控制回路，控制可变频率振荡器的第三控制回路; 通过模拟滤波器滤波意味着输入到可变增益放大器的读取信号; 操作第一，第二和第三噪声检测操作中的至少一个，所述第一噪声检测操作通过将来自可变增益放大器的输出信号的幅度与预定阈值进行比较来检测噪声的存在或不存在，第二噪声检测 操作在第二控制回路的操作期间检测噪声，第三噪声检测操作在第三控制回路的操作期间检测噪声; 以及根据第一，第二和第三噪声检测操作中的至少一个的结果改变模拟滤波器装置的截止频率的范围，从而控制第一，第二和第三控制回路中的至少一个。