公开(公告)号：US6104331A

公开(公告)日：2000-08-15

申请号：US161734

申请日：1998-09-29

申请人： Yoshiteru Ishida ,  Naoki Satoh ,  Terumi Takashi ,  Akihiko Hirano ,  Seiichi Mita

发明人： Yoshiteru Ishida ,  Naoki Satoh ,  Terumi Takashi ,  Akihiko Hirano ,  Seiichi Mita

IPC分类号： G11B5/09 ,  G11B5/012 ,  G11B19/04 ,  G11B20/10 ,  G11B20/24 ,  G11B23/00 ,  H03M1/12 ,  G11B5/02

CPC分类号： G11B19/04 ,  G11B20/10009 ,  G11B20/24 ,  G11B5/012 ,  G11B23/0007 ,  G11B5/09

摘要： A reproduced signal processing circuit includes a variable gain amplifier to which a signal read from a medium by a reproducing head is inputted; an analog-to-digital converter for converting a signal outputted from the variable gain amplifier into a digital signal; and a variable frequency oscillator for supplying an operation clock signal to the analog-to-digital converter. A reproduced signal processing method includes the steps of operating a first control loop for controlling the variable gain amplifier; operating at least either one of a second control loop and a third control loop, the second control loop controlling the variable frequency oscillator, the third control loop controlling the variable frequency oscillator; filtering by analog filter means the read signal inputted to the variable gain amplifier; operating at least one of first, second, and third noise detecting operations, the first noise detecting operation detecting presence or absence of a noise by comparing an amplitude of the output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting operation detecting a noise during an operation period of the second control loop, the third noise detecting operation detecting a noise during an operation period of the third control loop; and changing the range of cutoff frequency of the analog filter means in accordance with a result from at least one of the first, second, and third noise detecting operations, thereby controlling at least one of the first, second, and third control loops.

摘要翻译： 再现信号处理电路包括可变增益放大器，从再现头从介质读取的信号被输入到该可变增益放大器; 用于将从可变增益放大器输出的信号转换为数字信号的模拟 - 数字转换器; 以及用于向模数转换器提供操作时钟信号的可变频率振荡器。 再现信号处理方法包括以下步骤：操作用于控制可变增益放大器的第一控制环路; 操作第二控制回路和第三控制回路中的至少一个，控制可变频率振荡器的第二控制回路，控制可变频率振荡器的第三控制回路; 通过模拟滤波器滤波意味着输入到可变增益放大器的读取信号; 操作第一，第二和第三噪声检测操作中的至少一个，所述第一噪声检测操作通过将来自可变增益放大器的输出信号的幅度与预定阈值进行比较来检测噪声的存在或不存在，第二噪声检测 操作在第二控制回路的操作期间检测噪声，第三噪声检测操作在第三控制回路的操作期间检测噪声; 以及根据第一，第二和第三噪声检测操作中的至少一个的结果改变模拟滤波器装置的截止频率的范围，从而控制第一，第二和第三控制回路中的至少一个。

公开(公告)号：US5818655A

公开(公告)日：1998-10-06

申请号：US506635

申请日：1995-07-25

申请人： Naoki Satoh ,  Seiichi Mita ,  Shoichi Miyazawa ,  Terumi Takashi ,  Yosuke Hori ,  Yoshiju Watanabe ,  Akihiko Hirano ,  Satoshi Minoshima ,  Hideki Miyasaka ,  Toshihiro Nitta ,  Tomoaki Hirai ,  Ryushi Shimokawa ,  Koji Shida ,  Yasuhide Ouchi

发明人： Naoki Satoh ,  Seiichi Mita ,  Shoichi Miyazawa ,  Terumi Takashi ,  Yosuke Hori ,  Yoshiju Watanabe ,  Akihiko Hirano ,  Satoshi Minoshima ,  Hideki Miyasaka ,  Toshihiro Nitta ,  Tomoaki Hirai ,  Ryushi Shimokawa ,  Koji Shida ,  Yasuhide Ouchi

IPC分类号： G11B5/035 ,  G11B5/09 ,  G11B20/10

CPC分类号： G11B20/10055 ,  G11B20/10009 ,  G11B20/10481 ,  G11B5/035 ,  G11B5/09

摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.

公开(公告)号：US5659309A

公开(公告)日：1997-08-19

申请号：US389773

申请日：1995-02-16

申请人： Terumi Takashi ,  Yasuhide Ouchi ,  Seiichi Mita ,  Akihiko Hirano ,  Naoki Satoh

发明人： Terumi Takashi ,  Yasuhide Ouchi ,  Seiichi Mita ,  Akihiko Hirano ,  Naoki Satoh

IPC分类号： G11B20/18 ,  G11B20/10 ,  H03M13/23 ,  H03M13/41 ,  H03M7/00

CPC分类号： H03M13/6343 ,  G11B20/10009 ,  H03M13/41

摘要： A data recording/reproducing apparatus and method therefor having a Viterbi decoder which stores operation result values of an inputted reproduced signal and the reference value when the peak value of the reproduced signal is updated, compares this value with the reproduced signal in amplitude, updates the stored value when the result satisfies the predetermined condition, detects a change in the polarity of the comparison result, controls the clock counter depending on the status of the peak value updating signal, sets 1 in the shift register at the position indicated by the counter according to the detected polarity inversion signal when the peak value is updated, and accordingly makes the updating and detecting operations independent of operations of addition and subtraction of the current reproduced signal and reference value and operations of addition and subtraction of amplitude comparison.

摘要翻译： 一种数据记录/再现装置和方法，其具有维特比解码器，其在再现信号的峰值被更新时存储输入的再现信号的运算结果值和参考值，将该值与振幅的再现信号进行比较，更新 当结果满足预定条件时，存储值检测比较结果的极性的变化，根据峰值更新信号的状态来控制时钟计数器，根据计数器指示的位置在移位寄存器中设置1 当更新峰值时检测到的极性反转信号，并且因此使得更新和检测操作与当前再现信号的加法和减法操作无关，参考值和幅度比较的相加和减法操作。

公开(公告)号：US06661594B2

公开(公告)日：2003-12-09

申请号：US10277695

申请日：2002-10-23

申请人： Naoki Satoh ,  Seiichi Mita ,  Shoichi Miyazawa ,  Terumi Takashi ,  Yosuke Hori ,  Yoshiju Watanabe ,  Akihiko Hirano ,  Satoshi Minoshima ,  Hideki Miyasaka ,  Toshihiro Nitta ,  Tomoaki Hirai ,  Ryushi Shimokawa ,  Koji Shida ,  Yasuhide Ouchi

发明人： Naoki Satoh ,  Seiichi Mita ,  Shoichi Miyazawa ,  Terumi Takashi ,  Yosuke Hori ,  Yoshiju Watanabe ,  Akihiko Hirano ,  Satoshi Minoshima ,  Hideki Miyasaka ,  Toshihiro Nitta ,  Tomoaki Hirai ,  Ryushi Shimokawa ,  Koji Shida ,  Yasuhide Ouchi

IPC分类号： G11B535

CPC分类号： G11B20/10055 ,  G11B5/035 ,  G11B5/09 ,  G11B20/10009 ,  G11B20/10481

摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.

摘要翻译： 一种用于至少包括AGC，PLL，LPF，均衡器电路和检测电路的磁记录/再现装置的信号处理电路，其中通过定义均衡器电路的结构形成系数补偿电路，错误 提供检测电路，其通过接收来自检测电路的输入而工作，并且LSI由多个模拟和数字芯片形成，并且模拟和数字芯片通过电流输出型D / A转换器连接至少至少 AGC和PLL。

公开(公告)号：US06069856A

公开(公告)日：2000-05-30

申请号：US975670

申请日：1997-11-28

申请人： Seiichi Mita ,  Terumi Takashi ,  Naoki Satoh

发明人： Seiichi Mita ,  Terumi Takashi ,  Naoki Satoh

IPC分类号： G11B20/14 ,  G11B5/012 ,  G11B5/09 ,  G11B20/10 ,  G11B20/18 ,  G11B7/005

CPC分类号： G11B20/10009 ,  G11B5/012 ,  G11B5/09

摘要： An information recording/reproducing apparatus includes first and second data demodulators having different data discriminating capabilities. The first data demodulator has a lower data discriminating capability and the second data demodulator has a higher data discriminating capability. When the reliability of reliability information for demodulation data generated by the first data demodulator, the second data demodulator is operated so that demodulation data generated by the first data demodulator is replaced by demodulation data generated by the second data demodulator during a period of time when the reliability of the reliability information is deteriorated.

摘要翻译： 信息记录/再现装置包括具有不同数据鉴别能力的第一和第二数据解调器。 第一数据解调器具有较低的数据鉴别能力，第二数据解调器具有较高的数据识别能力。 当由第一数据解调器产生的解调数据的可靠性信息的可靠性操作时，第二数据解调器被操作，使得由第一数据解调器产生的解调数据被第二数据解调器产生的解调数据替换为在第 可靠性信息的可靠性恶化。

公开(公告)号：US20060227451A1

公开(公告)日：2006-10-12

申请号：US11400579

申请日：2006-04-07

申请人： Naoki Satoh ,  Yoshiteru Ishida ,  Yoshiju Watanabe ,  Terumi Takashi

发明人： Naoki Satoh ,  Yoshiteru Ishida ,  Yoshiju Watanabe ,  Terumi Takashi

IPC分类号： G11B21/02 ,  G11B5/09 ,  G11B15/46

CPC分类号： G11B19/26

摘要： Embodiments of the invention increase the convenience of a magnetic disk drive for portable use by shortening a period of time required to record a large amount of data, and by increasing the reproduction time, in the magnetic disk drive. In one embodiment, an area between servo data parts is interpolated by servo data parts, each of which stores a burst signal, so that the allocation density of a burst signal is made k times. At the time of write operation in which data is written, only the servo data parts are made use of to perform the servo control while a disk is driven at high rotational speed so as to reduce the recording time. At the time of read operation in which data is reproduced, the servo data parts are made use of to ensure the required precision of the servo control at low rotational speed that is 1/k of the rotational speed at the time of write operation. The reproduction at low rotational speed enables the reduction in power consumption.

公开(公告)号：US07408733B2

公开(公告)日：2008-08-05

申请号：US11400579

申请日：2006-04-07

申请人： Naoki Satoh ,  Yoshiteru Ishida ,  Yoshiju Watanabe ,  Terumi Takashi

发明人： Naoki Satoh ,  Yoshiteru Ishida ,  Yoshiju Watanabe ,  Terumi Takashi

IPC分类号： G11B5/596 ,  G11B19/26

CPC分类号： G11B19/26

摘要： Embodiments of the invention increase the convenience of a magnetic disk drive for portable use by shortening a period of time required to record a large amount of data, and by increasing the reproduction time, in the magnetic disk drive. In one embodiment, an area between servo data parts is interpolated by servo data parts, each of which stores a burst signal, so that the allocation density of a burst signal is made k times. At the time of write operation in which data is written, only the servo data parts are made use of to perform the servo control while a disk is driven at high rotational speed so as to reduce the recording time. At the time of read operation in which data is reproduced, the servo data parts are made use of to ensure the required precision of the servo control at low rotational speed that is 1/k of the rotational speed at the time of write operation. The reproduction at low rotational speed enables the reduction in power consumption.

摘要翻译： 本发明的实施例通过缩短记录大量数据所需的时间周期以及通过增加磁盘驱动器中的再现时间来增加用于便携式使用的磁盘驱动器的便利性。 在一个实施例中，伺服数据部分之间的区域由伺服数据部分内插，每个伺服数据部分存储脉冲串信号，使得脉冲信号的分配密度为k次。 在写入数据的写入操作时，仅利用伺服数据部分来执行伺服控制，同时以高转速驱动盘，以便减少记录时间。 在再现数据的读取操作时，利用伺服数据部分来确保在写入操作时转速为1 / k的低转速下的伺服控制所要求的精度。 在低转速下的再现能够降低功耗。

公开(公告)号：US06215744B1

公开(公告)日：2001-04-10

申请号：US09504796

申请日：2000-02-15

申请人： Seiichi Mita ,  Terumi Takashi ,  Naoki Satoh

发明人： Seiichi Mita ,  Terumi Takashi ,  Naoki Satoh

IPC分类号： G11B7005

CPC分类号： G11B20/10009 ,  G11B5/012 ,  G11B5/09

摘要： An information recording/reproducing apparatus includes first and second data demodulators having different data discriminating capabilities. The first data demodulator has a lower data discriminating capability and the second data demodulator has a higher data discriminating capability. When the reliability of reliability information for demodulation data generated by the first data demodulator, the second data demodulator is operated so that demodulation data generated by the first data demodulator is replaced by demodulation data generated by the second data demodulator during a period of time when the reliability of the reliability information is deteriorated.

摘要翻译： 信息记录/再现装置包括具有不同数据鉴别能力的第一和第二数据解调器。 第一数据解调器具有较低的数据鉴别能力，第二数据解调器具有较高的数据识别能力。 当由第一数据解调器产生的解调数据的可靠性信息的可靠性操作时，第二数据解调器被操作，使得由第一数据解调器产生的解调数据被第二数据解调器产生的解调数据替换为在第 可靠性信息的可靠性恶化。

公开(公告)号：US20090015960A1

公开(公告)日：2009-01-15

申请号：US12217075

申请日：2008-06-30

申请人： Naoki Satoh ,  Yoshiteru Ishida ,  Yoshiju Watanabe ,  Terumi Takashi

发明人： Naoki Satoh ,  Yoshiteru Ishida ,  Yoshiju Watanabe ,  Terumi Takashi

IPC分类号： G11B15/46

CPC分类号： G11B19/26

摘要： Embodiments of the invention increase the convenience of a magnetic disk drive for portable use by shortening a period of time required to record a large amount of data, and by increasing the reproduction time, in the magnetic disk drive. In one embodiment, an area between servo data parts is interpolated by servo data parts, each of which stores a burst signal, so that the allocation density of a burst signal is made k times. At the time of write operation in which data is written, only the servo data parts are made use of to perform the servo control while a disk is driven at high rotational speed so as to reduce the recording time. At the time of read operation in which data is reproduced, the servo data parts are made use of to ensure the required precision of the servo control at low rotational speed that is 1/k of the rotational speed at the time of write operation. The reproduction at low rotational speed enables the reduction in power consumption.

摘要翻译： 本发明的实施例通过缩短记录大量数据所需的时间周期以及通过增加磁盘驱动器中的再现时间来增加用于便携式使用的磁盘驱动器的便利性。 在一个实施例中，伺服数据部分之间的区域由伺服数据部分内插，每个伺服数据部分存储脉冲串信号，使得脉冲信号的分配密度为k次。 在写入数据的写入操作时，仅利用伺服数据部分来执行伺服控制，同时以高转速驱动盘，以便减少记录时间。 在再现数据的读取操作时，利用伺服数据部分来确保在写入操作时转速为1 / k的低转速下的伺服控制所要求的精度。 在低转速下的再现能够降低功耗。

公开(公告)号：US5805024A

公开(公告)日：1998-09-08

申请号：US536264

申请日：1995-09-29

申请人： Terumi Takashi ,  Naoki Satoh ,  Akihiko Hirano ,  Eisaku Saiki ,  Masakazu Hosino ,  Ryushi Shimokawa

发明人： Terumi Takashi ,  Naoki Satoh ,  Akihiko Hirano ,  Eisaku Saiki ,  Masakazu Hosino ,  Ryushi Shimokawa

IPC分类号： G11B5/012 ,  G11B20/10 ,  G11B20/14 ,  H03L7/087 ,  H03L7/107 ,  G11B5/00 ,  G11B27/10 ,  H03L7/10

CPC分类号： H03L7/087 ,  G11B20/10009 ,  G11B20/1403 ,  H03L7/107 ,  G11B5/012

摘要： A phase lock loop system includes: a phase detecting circuit which operates on the basis of a signal waveform; a current output circuit for generating a current value from a phase difference detected by the phase detecting circuit; a filter which is constructed by only a resistor in a phase locked state by a synchronizing signal and by a capacitor and the resistor upon phase following state; and a voltage controlled oscillator for controlling an oscillation frequency by a voltage output of the filter. The phase lock loop system operates as a primary phase lock loop circuit in the phase locked state by the synchronizing signal and operates as a secondary phase lock loop circuit upon phase following state.

摘要翻译： 锁相环系统包括：基于信号波形进行工作的相位检测电路; 电流输出电路，用于根据由相位检测电路检测的相位差产生电流值; 由相位锁定状态的电阻器由同步信号和电容器构成的滤波器以及相位跟随状态下的电阻器; 以及用于通过滤波器的电压输出来控制振荡频率的压控振荡器。 锁相环系统通过同步信号作为锁相状态的主锁相环电路工作，并且在相位跟随状态下作为次锁相环电路工作。