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10 条记录 (耗时 0.021 秒)

    Liquid crystal display drive circuit
    1.
    发明授权
    Liquid crystal display drive circuit 有权
    液晶显示驱动电路

    公开(公告)号：US08154496B2

    公开(公告)日：2012-04-10

    申请号：US12274645

    申请日：2008-11-20

    申请人： Yoshiyuki Yamagata ,  Tetsuya Tokunaga ,  Yasuo Osawa ,  Kensuke Goto

    发明人： Yoshiyuki Yamagata ,  Tetsuya Tokunaga ,  Yasuo Osawa ,  Kensuke Goto

    IPC分类号： G09G3/36

    CPC分类号： G09G3/18 ,  G09G3/04 ,  G09G2310/0245 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2330/02

    摘要： This invention offers an LCD drive circuit that prevents conversion to a wrong duty driving state and an unintended display caused by taking in of serial data corresponding to the wrong duty driving state. The LCD drive circuit is provided with an LCD drive signal generation circuit that generates driving signals to turn LCD segments on and off based on serial data received by a serial data receiving circuit and is switchable between a ¼ duty driving state and a ⅓ duty driving state. The LCD drive circuit is also provided with a driving state setting circuit that sets the LCD drive signal generation circuit to the ¼ duty driving state based on identification data when the serial data receiving circuit receives the serial data corresponding to the ¼ duty driving state and thereafter forbids the LCD drive signal generation circuit to take in serial data corresponding to the ⅓ duty driving state when the serial data receiving circuit receives the serial data corresponding to the ⅓ duty driving state.

    摘要翻译： 本发明提供了一种LCD驱动电路，其防止转换为错误的占空比驱动状态，以及通过接收与错误的占空比驱动状态相对应的串行数据而引起的非预期显示。 LCD驱动电路设置有LCD驱动信号发生电路，其根据由串行数据接收电路接收到的串行数据产生驱动信号以使LCD段导通和关断，并且可在¼负载驱动状态和÷占空比驱动状态之间切换 。 LCD驱动电路还设置有驱动状态设置电路，当串行数据接收电路接收到对应于¼占空比驱动状态的串行数据时，基于识别数据将LCD驱动信号发生电路设置为¼占空比驱动状态 禁止LCD驱动信号发生电路在串行数据接收电路接收到与占空比驱动状态相对应的串行数据时，获取对应于三位负荷驱动状态的串行数据。

    Noise-tolerant data communication system
    5.
    发明授权
    Noise-tolerant data communication system 有权
    耐噪数据通信系统

    公开(公告)号：US08082375B2

    公开(公告)日：2011-12-20

    申请号：US12186149

    申请日：2008-08-05

    申请人： Tetsuya Tokunaga ,  Yoshiyuki Yamagata ,  Yasuo Osawa ,  Kensuke Goto

    发明人： Tetsuya Tokunaga ,  Yoshiyuki Yamagata ,  Yasuo Osawa ,  Kensuke Goto

    IPC分类号： G06F3/00 ,  G06F1/12

    CPC分类号： G06F1/12 ,  G06F13/4291

    摘要： This invention offers a data communication system that can perform data communication and detection of a data read-in request signal while reducing the number of communication lines to three, and is tolerant of noise. The data communication between a microcomputer and a key scan IC and the detection of the data read-in request signal are performed through a control line, a clock line and a data line. The data communication system is provided with a data line control circuit that controls the data line so that outputting of the data read-in signal RDRQ to the data line is disabled when first command data is inputted to the key scan IC through the data line, and that the outputting of the data read-in request signal RDRQ to the data line is enabled when second command data is inputted from the microcomputer to the key scan IC through the data line.

    摘要翻译： 本发明提供了一种数据通信系统，其可以在将通信线路的数量减少到三个的同时执行数据读取请求信号的数据通信和检测，并且容忍噪声。 通过控制线，时钟线和数据线来执行微型计算机与键扫描IC之间的数据通信以及数据读入请求信号的检测。 数据通信系统设置有数据线控制电路，其控制数据线，使得当通过数据线将第一命令数据输入到键扫描IC时，数据读取信号RDRQ向数据线的输出被禁止， 并且当通过数据线从微型计算机向键扫描IC输入第二命令数据时，能够将数据读入请求信号RDRQ输出到数据线。

    LIQUID CRYSTAL DISPLAY DRIVE CIRCUIT
    6.
    发明申请
    LIQUID CRYSTAL DISPLAY DRIVE CIRCUIT 有权
    液晶显示驱动电路

    公开(公告)号：US20090140969A1

    公开(公告)日：2009-06-04

    申请号：US12274645

    申请日：2008-11-20

    申请人： Yoshiyuki Yamagata ,  Tetsuya Tokunaga ,  Yasuo Osawa ,  Kensuke Goto

    发明人： Yoshiyuki Yamagata ,  Tetsuya Tokunaga ,  Yasuo Osawa ,  Kensuke Goto

    IPC分类号： G09G3/36

    CPC分类号： G09G3/18 ,  G09G3/04 ,  G09G2310/0245 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2330/02

    摘要： This invention offers an LCD drive circuit that prevents conversion to a wrong duty driving state and an unintended display caused by taking in of serial data corresponding to the wrong duty driving state. The LCD drive circuit is provided with an LCD drive signal generation circuit that generates driving signals to turn LCD segments on and off based on serial data received by a serial data receiving circuit and is switchable between a ¼ duty driving state and a ⅓ duty driving state. The LCD drive circuit is also provided with a driving state setting circuit that sets the LCD drive signal generation circuit to the ¼ duty driving state based on identification data when the serial data receiving circuit receives the serial data corresponding to the ¼ duty driving state and thereafter forbids the LCD drive signal generation circuit to take in serial data corresponding to the ⅓ duty driving state when the serial data receiving circuit receives the serial data corresponding to the ⅓ duty driving state.

    摘要翻译： 本发明提供了一种LCD驱动电路，其防止转换为错误的占空比驱动状态，以及通过接收与错误的占空比驱动状态相对应的串行数据而引起的非预期显示。 LCD驱动电路配备有LCD驱动信号发生电路，该电路根据串行数据接收电路所接收的串行数据产生驱动信号，使LCD段导通和关断，并且可在1/4负载驱动状态和1/3负载之间切换 驾驶状态 LCD驱动电路还设置有驱动状态设置电路，当串行数据接收电路接收到对应于¼占空比驱动状态的串行数据时，基于识别数据将LCD驱动信号发生电路设置为¼占空比驱动状态 当串行数据接收电路接收到对应于1/3占空比驱动状态的串行数据时，禁止LCD驱动信号发生电路采取对应于1/3占空比驱动状态的串行数据。

    DATA COMMUNICATION SYSTEM
    7.
    发明申请
    DATA COMMUNICATION SYSTEM 有权
    数据通信系统

    公开(公告)号：US20090043929A1

    公开(公告)日：2009-02-12

    申请号：US12186149

    申请日：2008-08-05

    申请人： Tetsuya TOKUNAGA ,  Yoshiyuki Yamagata ,  Yasuo Osawa ,  Kensuke Goto

    发明人： Tetsuya TOKUNAGA ,  Yoshiyuki Yamagata ,  Yasuo Osawa ,  Kensuke Goto

    IPC分类号： G06F1/12

    CPC分类号： G06F1/12 ,  G06F13/4291

    摘要： This invention offers a data communication system that can perform data communication and detection of a data read-in request signal while reducing the number of communication lines to three, and is tolerant of noise. The data communication between a microcomputer and a key scan IC and the detection of the data read-in request signal are performed through a control line, a clock line and a data line. The data communication system is provided with a data line control circuit that controls the data line so that outputting of the data read-in signal RDRQ to the data line is disabled when first command data is inputted to the key scan IC through the data line, and that the outputting of the data read-in request signal RDRQ to the data line is enabled when second command data is inputted from the microcomputer to the key scan IC through the data line.

    摘要翻译： 本发明提供了一种数据通信系统，其可以在将通信线路的数量减少到三个的同时执行数据读取请求信号的数据通信和检测，并且容忍噪声。 通过控制线，时钟线和数据线来执行微型计算机与键扫描IC之间的数据通信以及数据读入请求信号的检测。 数据通信系统设置有数据线控制电路，其控制数据线，使得当通过数据线将第一命令数据输入到键扫描IC时，数据读取信号RDRQ向数据线的输出被禁止， 并且当通过数据线从微型计算机向键扫描IC输入第二命令数据时，能够将数据读入请求信号RDRQ输出到数据线。

    Data output circuit
    9.
    发明授权
    Data output circuit 有权
    数据输出电路

    公开(公告)号：US08081095B2

    公开(公告)日：2011-12-20

    申请号：US12134525

    申请日：2008-06-06

    申请人： Yasuo Osawa ,  Hiroyuki Arai ,  Tetsuya Tokunaga ,  Yoshiyuki Yamagata

    发明人： Yasuo Osawa ,  Hiroyuki Arai ,  Tetsuya Tokunaga ,  Yoshiyuki Yamagata

    IPC分类号： H03M9/00

    CPC分类号： G09G3/3685

    摘要： A data output circuit includes: a data generating circuit configured to generate output data; and a serial output circuit configured to receive an address corresponding to the data generating circuit, hold a parallel data input during a time period over which the address is being received, and serially output the output data generated by the data generating circuit and the held parallel data in accordance with an output direction signal for directing output of the data.

    摘要翻译： 数据输出电路包括：数据产生电路，被配置为产生输出数据; 以及串行输出电路，被配置为接收对应于数据产生电路的地址，在接收地址的时间段内保持并行数据输入，并且串行输出由数据产生电路产生的输出数据和所保持的并行 根据用于引导数据输出的输出方向信号的数据。

    Data Output Circuit
    10.
    发明申请
    Data Output Circuit 有权
    数据输出电路

    公开(公告)号：US20080303761A1

    公开(公告)日：2008-12-11

    申请号：US12134525

    申请日：2008-06-06

    申请人： Yasuo Osawa ,  Hiroyuki Arai ,  Tetsuya Tokunaga ,  Yoshiyuki Yamagata

    发明人： Yasuo Osawa ,  Hiroyuki Arai ,  Tetsuya Tokunaga ,  Yoshiyuki Yamagata

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3685

    摘要： A data output circuit includes: a data generating circuit configured to generate output data; and a serial output circuit configured to receive an address corresponding to the data generating circuit, hold a parallel data input during a time period over which the address is being received, and serially output the output data generated by the data generating circuit and the held parallel data in accordance with an output direction signal for directing output of the data.

    摘要翻译： 数据输出电路包括：数据产生电路，被配置为产生输出数据; 以及串行输出电路，被配置为接收对应于数据产生电路的地址，在接收地址的时间段内保持并行数据输入，并且串行输出由数据产生电路产生的输出数据和所保持的并行 根据用于引导数据输出的输出方向信号的数据。