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公开(公告)号：US20100257397A1
公开(公告)日：2010-10-07
申请号：US12417828
申请日：2009-04-03
CPC分类号： G06F13/4243 , G06F13/1689
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for the active training of memory command timing. In some embodiments, the CMD/CTL timing is actively trained using active feedback between memory modules and the memory controller. Other embodiments are described and claimed.
摘要翻译： 本发明的实施例一般涉及用于存储器命令定时的主动训练的系统，方法和装置。 在一些实施例中，使用存储器模块和存储器控制器之间的主动反馈主动地训练CMD / CTL定时。 描述和要求保护其他实施例。
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公开(公告)号：US08819474B2
公开(公告)日：2014-08-26
申请号：US12417828
申请日：2009-04-03
IPC分类号： G06F1/12
CPC分类号： G06F13/4243 , G06F13/1689
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for the active training of memory command timing. In some embodiments, the CMD/CTL timing is actively trained using active feedback between memory modules and the memory controller. Other embodiments are described and claimed.
摘要翻译： 本发明的实施例一般涉及用于存储器命令定时的主动训练的系统，方法和装置。 在一些实施例中，使用存储器模块和存储器控制器之间的主动反馈主动地训练CMD / CTL定时。 描述和要求保护其他实施例。
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3.发明授权Method and system for evaluating effects of signal phase difference on a memory system 有权用于评估信号相位差对存储器系统的影响的方法和系统公开(公告)号：US08331176B2
公开(公告)日：2012-12-11
申请号：US12628103
申请日：2009-11-30
申请人： Christopher P. Mozak , Kevin B. Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Christopher E. Yunker
发明人： Christopher P. Mozak , Kevin B. Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Christopher E. Yunker
IPC分类号： G11C29/00
CPC分类号： G11C29/02 , G11C29/023 , G11C29/028
摘要： In an embodiment, the effect of signal phase difference on a memory system is tested for various operating states. The various operating states may be represented as respective sample points on a plane defined by a range of values for a difference in signal phases and a range of values for another operating state parameter. In various embodiments, sample points for a round of crosstalk testing may include two sample points which are offset from the same reference point on the plane along different respective axes, where the axes are oblique to one another.
摘要翻译： 在一个实施例中，针对各种操作状态测试信号相位差对存储器系统的影响。 各种操作状态可以被表示为由用于信号相位差和用于另一操作状态参数的值的范围的值的范围所限定的平面上的相应采样点。 在各种实施例中，用于一轮串扰测试的采样点可以包括两个采样点，这两个采样点沿着不同相应轴的平面上的相同参考点偏移，其中轴彼此倾斜。
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4.发明申请METHOD AND SYSTEM FOR EVALUATING EFFECTS OF SIGNAL PHASE DIFFERENCE ON A MEMORY SYSTEM 有权用于评估信号相位差对存储器系统的影响的方法和系统公开(公告)号：US20110131458A1
公开(公告)日：2011-06-02
申请号：US12628103
申请日：2009-11-30
申请人： Christopher P. Mozak , Kevin B. Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Christopher E. Yunker
发明人： Christopher P. Mozak , Kevin B. Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Christopher E. Yunker
CPC分类号： G11C29/02 , G11C29/023 , G11C29/028
摘要： In an embodiment, the effect of signal phase difference on a memory system is tested for various operating states. The various operating states may be represented as respective sample points on a plane defined by a range of values for a difference in signal phases and a range of values for another operating state parameter. In various embodiments, sample points for a round of crosstalk testing may include two sample points which are offset from the same reference point on the plane along different respective axes, where the axes are oblique to one another.
摘要翻译： 在一个实施例中，针对各种操作状态测试信号相位差对存储器系统的影响。 各种操作状态可以被表示为由用于信号相位差和用于另一操作状态参数的值的范围的值的范围所限定的平面上的相应采样点。 在各种实施例中，用于一轮串扰测试的采样点可以包括两个采样点，这两个采样点沿着不同相应轴的平面上的相同参考点偏移，其中轴彼此倾斜。
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5.发明申请METHOD AND APPARATUS FOR DYNAMICALLY ADJUSTING VOLTAGE REFERENCE TO OPTIMIZE AN I/O SYSTEM 有权用于动态调整电压参考以优化I / O系统的方法和装置公开(公告)号：US20110141827A1
公开(公告)日：2011-06-16
申请号：US12638887
申请日：2009-12-15
申请人： Christopher Mozak , Kevin Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Chris Yunker
发明人： Christopher Mozak , Kevin Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Chris Yunker
IPC分类号： G11C5/14
CPC分类号： G11C11/4091 , G11C5/147 , G11C11/4074 , G11C11/4093 , G11C11/4099
摘要： Described herein is an apparatus for dynamically adjusting a voltage reference level for optimizing an I/O system to achieve a certain performance metric. The apparatus comprises: a voltage reference generator to generate a voltage reference; and a dynamic voltage reference control unit, coupled with the voltage reference generator, to dynamically adjust a level of the voltage reference in response to an event. The apparatus is used to perform the method comprising: generating a voltage reference for an input/output (I/O) system; determining a worst case voltage level of the voltage reference; dynamically adjusting, via a dynamic voltage reference control unit, the voltage reference level based on determining the worst case voltage level; and computing a center of an asymmetrical eye based on the dynamically adjusted voltage reference level.
摘要翻译： 这里描述了一种用于动态调整电压参考电平以便优化I / O系统以实现某一性能度量的装置。 该装置包括：电压基准发生器，用于产生电压基准; 以及与电压参考发生器耦合的动态电压参考控制单元，以响应于事件来动态地调整电压参考电平。 该装置用于执行该方法，包括：产生用于输入/输出（I / O）系统的电压基准; 确定电压基准的最坏情况电压电平; 基于确定最坏情况电压电平，通过动态电压基准控制单元动态调整电压参考电平; 以及基于动态调整的电压参考电平计算不对称眼睛的中心。
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6.发明授权Method and apparatus for dynamically adjusting voltage reference to optimize an I/O system 有权用于动态调整电压参考以优化I / O系统的方法和装置公开(公告)号：US08582374B2
公开(公告)日：2013-11-12
申请号：US12638887
申请日：2009-12-15
申请人： Christopher Mozak , Kevin Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Chris Yunker
发明人： Christopher Mozak , Kevin Moore , John V. Lovelace , Zale Theodore Schoenborn , Bryan L. Spry , Chris Yunker
IPC分类号： G11C5/14
CPC分类号： G11C11/4091 , G11C5/147 , G11C11/4074 , G11C11/4093 , G11C11/4099
摘要： Described herein is an apparatus for dynamically adjusting a voltage reference level for optimizing an I/O system to achieve a certain performance metric. The apparatus comprises: a voltage reference generator to generate a voltage reference; and a dynamic voltage reference control unit, coupled with the voltage reference generator, to dynamically adjust a level of the voltage reference in response to an event. The apparatus is used to perform the method comprising: generating a voltage reference for an input/output (I/O) system; determining a worst case voltage level of the voltage reference; dynamically adjusting, via a dynamic voltage reference control unit, the voltage reference level based on determining the worst case voltage level; and computing a center of an asymmetrical eye based on the dynamically adjusted voltage reference level.
摘要翻译： 这里描述了一种用于动态调整电压参考电平以便优化I / O系统以实现某一性能度量的装置。 该装置包括：电压基准发生器，用于产生电压基准; 以及与电压参考发生器耦合的动态电压参考控制单元，以响应于事件来动态地调整电压参考电平。 该装置用于执行该方法，包括：产生用于输入/输出（I / O）系统的电压基准; 确定电压基准的最坏情况电压电平; 基于确定最坏情况电压电平，通过动态电压基准控制单元动态调整电压参考电平; 以及基于动态调整的电压参考电平计算不对称眼睛的中心。
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7.发明授权Mechanism for detecting a no-processor swap condition and modification of high speed bus calibration during boot 有权用于检测无处理器交换条件的机制和引导期间高速总线校准的修改公开(公告)号：US08843732B2
公开(公告)日：2014-09-23
申请号：US12643108
申请日：2009-12-21
CPC分类号： G06F21/74 , G06F9/4403 , G06F21/44 , G06F21/575 , G06F21/71 , G06F21/73 , G06F21/85 , G06F2221/2105 , G06F2221/2129 , G06F2221/2149 , G06F2221/2153
摘要： Memory channel training parameters are function of electrical characteristics of memory devices, processor(s) and memory channel(s). Training steps can be skipped if the BIOS can determine that the memory devices, motherboard and processor have not changed since the last boot. Memory devices contain a serial number for tracking purposes and most motherboards contain a serial number. Many processors do not provide a mechanism by which the BIOS can track the processor. Described herein are techniques that allow the BIOS to track a processor and detect a swap without violating privacy/security requirements.
摘要翻译： 存储器通道训练参数是存储器件，处理器和存储器通道的电特性的函数。 如果BIOS可以确定自上次启动以来，内存设备，主板和处理器没有更改，则可跳过培训步骤。 存储器件包含用于跟踪目的的序列号，并且大多数主板都包含序列号。 许多处理器不提供BIOS可以跟踪处理器的机制。 这里描述的是允许BIOS跟踪处理器并检测交换而不违反隐私/安全要求的技术。
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公开(公告)号：US07949850B2
公开(公告)日：2011-05-24
申请号：US11966313
申请日：2007-12-28
IPC分类号： G06F12/08 , G06F15/177
CPC分类号： G06F11/1666 , G06F11/20
摘要： A method includes determining an amount of memory space in a memory device available for memory mirroring. The method further includes presenting the available memory space to an operating system. The method further includes selecting at least a portion of the amount of memory space to be used for memory mirroring with the operating system. The method further includes adding a non-selected portion of the available memory to memory space available to the operating system during operation. An associated system and machine readable medium are also disclosed.
摘要翻译： 一种方法包括确定可用于存储器镜像的存储器设备中的存储器空间量。 该方法还包括将可用存储器空间呈现给操作系统。 该方法还包括选择要用于与操作系统进行存储器镜像的存储空间量的至少一部分。 该方法还包括将可用存储器的未被选择的部分添加到操作系统可用的存储器空间。 还公开了一种相关联的系统和机器可读介质。
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公开(公告)号：US07107405B2
公开(公告)日：2006-09-12
申请号：US10449244
申请日：2003-05-30
申请人： John V. Lovelace
发明人： John V. Lovelace
IPC分类号： G06F12/00
CPC分类号： G06F12/0804
摘要： In one embodiment of the present invention, a method includes storing system management mode data in a cache of a system during a system management mode; and preventing the system from leaving the system management mode until the system management mode data is evicted from the cache.
摘要翻译： 在本发明的一个实施例中，一种方法包括在系统管理模式期间将系统管理模式数据存储在系统的高速缓存中; 并防止系统离开系统管理模式，直到系统管理模式数据从缓存中逐出。
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公开(公告)号：US06591352B2
公开(公告)日：2003-07-08
申请号：US09871035
申请日：2001-05-31
申请人： John P. Lambino , John V. Lovelace
发明人： John P. Lambino , John V. Lovelace
IPC分类号： G06F1200
CPC分类号： G06F9/4406 , G06F11/1417
摘要： A startup program for protecting against corruption of firmware resides in multiple blocks of a firmware device in a processor-based system. While the firmware device typically stores code, the device may additionally store data that is accessible to application programs. The startup program confirms that the block from which it executes is a valid startup block. If the block is not a valid startup block, the startup program searches the other blocks in the firmware device for a valid startup block. Upon identifying a valid startup block, the startup program sets an execution address such that subsequent initialization of the processor-based system occurs from the startup block.
摘要翻译： 用于防止固件损坏的启动程序驻留在基于处理器的系统中的固件设备的多个块中。 虽然固件设备通常存储代码，但是设备可以另外存储应用程序可访问的数据。 启动程序确认其执行的块是有效的启动块。 如果该块不是有效的启动块，则启动程序将搜索固件设备中的其他块以获取有效的启动块。 在识别有效的启动块时，启动程序设置执行地址，使得基于处理器的系统的后续初始化从启动块发生。
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