Elevator car separation based on response time
    1.
    发明授权
    Elevator car separation based on response time 有权
    基于响应时间的电梯轿厢分离

    公开(公告)号:US07152714B2

    公开(公告)日:2006-12-26

    申请号:US10552266

    申请日:2003-05-19

    IPC分类号: B66B1/18

    CPC分类号: B66B1/20

    摘要: The time required for each car to reach each up hall call and each down hall call is calculated (30, 33). These times are then arranged in categories and the number of landings in each category is identified. From fuzzy sets (FIGS. 7–10), the count of landings in each category determines a fuzzy set membership in a fuzzy category, such as FEW, SOME, MANY. The fuzzy membership of all non-zero memberships are then ANDed together (by multiplication). A relationship value is then determined (FIG. 11) by a metric with as many dimensions as there are categories, each dimension having as many parts as there are fuzzy categories in the fuzzy sets. The membership combination (the fuzzy summation) is then multiplied by a relationship value determined from the multi-dimensional metric to provide a corresponding separation metric of the invention.

    摘要翻译: 计算每个轿厢到达每个上门厅呼叫和每个下门厅呼叫所需的时间(30,33)。 然后将这些时间安排在类别中,并确定每个类别中的着陆数量。 从模糊集(图7-10),每个类别中的着陆计数确定模糊类别中的模糊集合隶属度,如FEW,SOME,MANY。 所有非零隶属关系的模糊隶属度随后通过乘法运算(AND)。 然后通过具有与类别相同的维度的度量来确定关系值(图11),每个维度具有与模糊集合中的模糊类别一样多的部分。 然后将会员组合(模糊求和)乘以从多维度量确定的关系值,以提供本发明的对应的分离度量。

    Network processor system including a central processor and at least one peripheral processor
    3.
    发明授权
    Network processor system including a central processor and at least one peripheral processor 有权
    网络处理器系统包括中央处理器和至少一个外围处理器

    公开(公告)号:US07860967B2

    公开(公告)日:2010-12-28

    申请号:US11328655

    申请日:2006-01-10

    CPC分类号: H04L69/22 Y10S707/99933

    摘要: The present invention consists of a general purpose, software-controlled central processor (CP) augmented by a set of task specific, specialized peripheral processors (PPs). The central processor accomplishes its functions with the support of the PPs. Peripheral processors may include but are not limited to a packet parser, which provides the central processor with a numerical summary of the packet format; a packet deconstructor, which extracts designated fields from the packet the positions of which are determined by the central processor according to the packet format; a search engine, which is supplied a lookup index by and returns its results to the central processor; and a packet editor which modifies the packet as determined by the central processor using (in part) information returned from other peripherals. At each step in the use of this network processor system, the central processor has an opportunity to intervene and modify the handling of the packet based on its interpretation of PP results. The programmable nature of the CP and the PPs provides the system with flexibility and adaptability: rather than having to modify a circuit or system design in an ASIC or other hardware, new packet processing applications may be accommodated through the development of new software and its deployment in the central and/or peripheral processors.

    摘要翻译: 本发明由通用的由软件控制的中央处理器(CP)组成,该中央处理器(CP)由一组任务特定的专用外围处理器(PP)增强。 中央处理器在PP的支持下完成其功能。 外围处理器可以包括但不限于分组解析器,其向中央处理器提供分组格式的数字摘要; 分组解构器,其从分组中提取指定的字段,其位置由中央处理器根据分组格式确定; 搜索引擎,其被提供查询索引并将其结果返回给中央处理器; 以及分组编辑器,其使用(部分地)从其他外围设备返回的信息来修改由中央处理器确定的分组。 在使用该网络处理器系统的每个步骤中,中央处理器有机会基于其对PP结果的解释来干预和修改分组的处理。 CP和PP的可编程性质为系统提供了灵活性和适应性:不必修改ASIC或其他硬件中的电路或系统设计,新的数据包处理应用程序可能通过开发新软件及其部署 在中央和/或外围处理器中。

    Block mask ternary CAM
    4.
    发明授权
    Block mask ternary CAM 有权
    块掩模三元CAM

    公开(公告)号:US06738862B1

    公开(公告)日:2004-05-18

    申请号:US10135711

    申请日:2002-04-29

    IPC分类号: G06F1200

    CPC分类号: G11C15/00

    摘要: The invention provides a method and system for flexible matching of data in a CAM, that does not use the overhead of one mask bit for each matched value bit. The entries of the CAM are logically grouped in a set of blocks, each block having a single mask that applies to all entries in the block. Each block includes a predetermined number of CAM entries, such as a block of 16 entries. However, in alternative embodiments, the number of CAM entries for each block could be predetermined to be a different number, or could be dynamically selected with the values that are entered into the CAM.

    摘要翻译: 本发明提供了一种用于CAM中的数据的灵活匹配的方法和系统,其不对每个匹配值比特使用一个掩码比特的开销。 CAM的条目在逻辑上分组在一组块中,每个块具有适用于块中的所有条目的单个掩码。 每个块包括预定数量的CAM条目,诸如16个条目的块。 然而,在替代实施例中,每个块的CAM条目的数量可以被预先确定为不同的数量,或者可以使用输入到CAM中的值来动态地选择。

    Method and apparatus for verifying the integrity of a content-addressable memory result
    5.
    发明授权
    Method and apparatus for verifying the integrity of a content-addressable memory result 有权
    用于验证内容可寻址存储器结果的完整性的方法和装置

    公开(公告)号:US07260673B1

    公开(公告)日:2007-08-21

    申请号:US09910227

    申请日:2001-07-20

    申请人: Mark A. Ross

    发明人: Mark A. Ross

    IPC分类号: G06F12/00

    CPC分类号: G11C15/00

    摘要: Methods and apparatus are disclosed for verifying the integrity of an index or result produced by a content-addressable or associated memory or other device. A pre-computed data protection field is stored, either as part of a returned index of a content-addressable memory or in a separate storage. In one implementation, a data protection operation is performed on all or part of the returned index and a comparison is made with a pre-computed data protection field. In one implementation, a copy of the masks employed by a ternary content-addressable memory and a set of pre-computed data protection fields are stored. A particular mask and pre-computed data protection field are selected based on the generated index. The original input value is then masked by the selected mask and provided to a data protection function. The result of this function is then compared to the selected pre-computed data protection field.

    摘要翻译: 公开了用于验证由内容寻址或相关联的存储器或其他设备产生的索引或结果的完整性的方法和装置。 存储预先计算的数据保护字段,作为内容可寻址存储器的返回索引的一部分或在单独的存储器中。 在一个实现中,对所有或部分返回的索引执行数据保护操作,并且与预先计算的数据保护字段进行比较。 在一个实现中,存储由三元内容可寻址存储器采用的掩码的副本和一组预先计算的数据保护字段。 基于生成的索引来选择特定的掩码和预计算的数据保护字段。 然后,原始输入值被所选掩码掩蔽并提供给数据保护功能。 然后将该功能的结果与所选择的预先计算的数据保护字段进行比较。

    Logical operation unit for packet processing
    6.
    发明授权
    Logical operation unit for packet processing 有权
    用于数据包处理的逻辑运算单元

    公开(公告)号:US06658002B1

    公开(公告)日:2003-12-02

    申请号:US09335800

    申请日:1999-06-17

    IPC分类号: H04L1256

    摘要: An apparatus and method for performing logical operations on information in the communications protocol stack, such as the transport layer (L4) port numbers, characterizing a received packet or frame of data in a data communications device such as a router or switch. The results of the logical operations, along with other packet/frame-identifying data, are used to generate a more efficient lookup key. A content addressable memory (CAM) lookup is used to determine the action indicated by the rules defined by a rule-based routing or switching scheme, such as an access control list (ACL). The results of these logical operations extend the key space and thus provide a finer-grained match between the original, unextended input key and a rule action, thereby pointing to a rule action precisely tailored to packet processing. The rule can thus be applied with fewer CAM entries, providing the versatility improvement and CAM cost reduction necessary to keep up with the ever-increasing rule complexity requirements of advanced data communication and internetworking systems. An embodiment utilizing asymmetrical processing of packets, depending on whether the packet is inbound to the data communications device or outbound from it, is also disclosed. Furthermore, a ternary content-addressable memory (TCAM) implementation is disclosed. Use of a TCAM for ACL or other rule lookups further enhances the efficiency of rule processing by providing a masking capability for each TCAM entry which can be used to provide an additional level of flexibility for rule element checking.

    摘要翻译: 对诸如传输层(L4)端口号的通信协议栈中的信息执行逻辑操作的装置和方法,表征诸如路由器或交换机之类的数据通信设备中的接收到的数据包或数据帧。 逻辑操作的结果连同其他分组/帧识别数据一起用于生成更有效的查找键。 内容可寻址存储器(CAM)查找用于确定由基于规则的路由或交换方案(诸如访问控制列表(ACL))定义的规则所指示的动作。 这些逻辑操作的结果扩展了密钥空间,从而在原始的,未扩展的输入密钥和规则动作之间提供了更细粒度的匹配,从而指向了针对数据包处理精确定制的规则操作。 因此,该规则可以应用于较少的CAM条目,提供多功能性改进和CAM成本降低,以适应高级数据通信和互联网络系统日益增长的规则复杂性要求。 还公开了一种利用分组的不对称处理的实施例,这取决于分组是否入站到数据通信设备或者从数据通信设备出站。 此外,公开了三元内容寻址存储器(TCAM)实现。 使用TCAM进行ACL或其他规则查找可以通过为每个TCAM条目提供掩蔽功能来进一步提高规则处理的效率,这可以用于为规则元素检查提供额外的灵活性水平。

    Content addressable memory architecture and circuits
    7.
    发明授权
    Content addressable memory architecture and circuits 失效
    内容可寻址存储器架构和电路

    公开(公告)号:US5270591A

    公开(公告)日:1993-12-14

    申请号:US843683

    申请日:1992-02-28

    申请人: Mark A. Ross

    发明人: Mark A. Ross

    CPC分类号: G11C15/04 G11C7/067

    摘要: A BICMOS sense amplifier for content addressable memory circuits which combines the low power dissipation and high noise immunity of CMOS devices while maintaining the high drive capability and switching speed associated with bipolar devices. A combination of an RS latch at the output of a bipolar sense amplifier storing this output, and a clamping device at the base of the bipolar sensing amplifier shorting the base to ground, bring the bipolar device out of saturation after each sensing cycle to improve the switching speed. A biasing network is designed to bring the base of the bipolar sense amplifier up to a base-emitter turn-on voltage, while maintaining the output at a high level to improve voltage sensitivity and switching speed. Current mirrors are used in the biasing network to optimize performance over temperature and process variations.

    摘要翻译: 用于内容可寻址存储器电路的BICMOS读出放大器,其结合了CMOS器件的低功耗和高抗噪性,同时保持了与双极器件相关的高驱动能力和开关速度。 在存储该输出的双极性读出放大器的输出处的RS锁存器和双极性检测放大器的基极处的钳位装置将基极短路到地之间的组合在每个感测周期之后使双极器件失去饱和度,以改善 切换速度。 偏置网络被设计成将双极性读出放大器的基极引导到基极 - 发射极导通电压,同时将输出保持在高电平以提高电压灵敏度和开关速度。 偏置网络中使用电流镜来优化温度和工艺变化的性能。

    Identification and authorization of communication devices
    8.
    发明授权
    Identification and authorization of communication devices 有权
    通信设备的识别和授权

    公开(公告)号:US09071441B2

    公开(公告)日:2015-06-30

    申请号:US12651952

    申请日:2010-01-04

    IPC分类号: H04L9/32 H04W12/06 G06F21/44

    摘要: A method implemented by a wearable wireless communication device (“WWCD”) includes detecting a connection between the WWCD and an accessory device. The WWCD accesses a memory location in the accessory device, the memory location being designated for storing brand data indicating a brand identity associated with the accessory device. The WWCD determines a brand status of the accessory device based on data, if any, accessed from the memory location in the accessory device. The WWCD also determines one or more interactions permitted between the WWCD and the accessory device based at least in part on the brand status of the accessory device.

    摘要翻译: 由可穿戴式无线通信设备(“WWCD”)实现的方法包括检测WWCD与附件设备之间的连接。 WWCD访问附件设备中的存储器位置,指定存储器位置用于存储指示与附件设备相关联的品牌标识的品牌数据。 WWCD根据从附件设备中的存储器位置访问的数据(如果有的话)确定附件设备的品牌状态。 WWCD还至少部分地基于附件设备的品牌状态来确定WWCD和附件设备之间允许的一个或多个交互。

    BARCODE RENDERING DEVICE
    9.
    发明申请
    BARCODE RENDERING DEVICE 有权
    条形码渲染设备

    公开(公告)号:US20120067944A1

    公开(公告)日:2012-03-22

    申请号:US12888129

    申请日:2010-09-22

    申请人: Mark A. Ross

    发明人: Mark A. Ross

    摘要: In one embodiment, a barcode rendering device includes a communication interface, a reflective display, and a detector. The communication interface is configured to receive barcode data corresponding to a barcode in one of a plurality of barcode symbologies. The reflective display is configured to legitimately display barcodes in any of the plurality of barcode symbologies. The detector is configured to detect illumination emitted by a barcode scanner and incident on the reflective display.

    摘要翻译: 在一个实施例中,条形码描绘设备包括通信接口,反射显示器和检测器。 通信接口被配置为接收与多个条形码符号中的一个条形码相对应的条形码数据。 反射显示器被配置为在多个条形码符号体系中合法地显示条形码。 检测器被配置为检测由条形码扫描器发射的入射到反射显示器上的照射。

    Hit result register file used in a CAM
    10.
    发明授权
    Hit result register file used in a CAM 有权
    在CAM中使用的命中结果寄存器文件

    公开(公告)号:US06535951B1

    公开(公告)日:2003-03-18

    申请号:US09515578

    申请日:2000-02-29

    申请人: Mark A. Ross

    发明人: Mark A. Ross

    IPC分类号: G06F1202

    CPC分类号: G11C15/00

    摘要: The invention provides a method and system for performing additional processing on CAM hit results, in which the additional processing does not add to the complexity or size of the CAM chip, can be altered after manufacture of the CAM chip, and does not delay other operations of the CAM. The CAM hit results are presented as indices from the CAM and sent to a hit result register file where they are stored. The contents of the hit result register file can be processed by other hardware or software coupled to the CAM. The index associated with the CAM input tag can be accessed using the hit result register file and a register indirect operation. The index associated with the CAM input tag can be used for CAM management functions in conjunction with (such as in parallel or pipelined) other CAM functions.

    摘要翻译: 本发明提供了一种用于对CAM命中结果执行附加处理的方法和系统,其中附加处理不会增加CAM芯片的复杂性或尺寸,可以在制造CAM芯片之后改变,并且不会延迟其他操作 的CAM。 CAM命中结果作为来自CAM的索引显示,并发送到命中结果寄存器文件,在那里存储它们。 命中结果寄存器文件的内容可以由耦合到CAM的其他硬件或软件处理。 可以使用命中结果寄存器文件和寄存器间接操作来访问与CAM输入标签相关的索引。 与CAM输入标签相关的索引可用于CAM管理功能(如并行或流水线)其他CAM功能。