公开(公告)号：US07649968B2

公开(公告)日：2010-01-19

申请号：US11272253

申请日：2005-11-10

申请人： Thomas Barber ,  Aiguo Yan ,  Palle Birk ,  Pier Bove

发明人： Thomas Barber ,  Aiguo Yan ,  Palle Birk ,  Pier Bove

IPC分类号： H04L7/00

CPC分类号： H04B7/2678 ,  H04B1/403 ,  H04W52/0293 ,  H04W56/00 ,  Y02D70/1222 ,  Y02D70/40 ,  Y02D70/449

摘要： A timing system is disclosed for use in a wireless communication system that includes wireless transceiver and a digital baseband processing system. The timing system includes a primary clock generation system that provides a low frequency clock that is used as the reference clock for a digital signal processing system, which generates low frequency timing signals, and a secondary clock generation system that provides a high frequency clock that is used by the wireless transceiver to produce high resolution timing signals to control the timing of the wireless transceiver. The high resolution timing signals are commenced responsive to a low resolution timing signal.

摘要翻译： 公开了一种在包括无线收发器和数字基带处理系统的无线通信系统中使用的定时系统。 定时系统包括主时钟发生系统，其提供用作产生低频定时信号的数字信号处理系统的参考时钟的低频时钟，以及提供高频时钟的次时钟生成系统， 由无线收发器使用以产生高分辨率定时信号以控制无线收发器的定时。 高分辨率定时信号响应于低分辨率定时信号而开始。

公开(公告)号：US20060120495A1

公开(公告)日：2006-06-08

申请号：US11272253

申请日：2005-11-10

申请人： Thomas Barber ,  Aiguo Yan ,  Palle Birk ,  Pier Bove

发明人： Thomas Barber ,  Aiguo Yan ,  Palle Birk ,  Pier Bove

IPC分类号： H04L7/00

CPC分类号： H04B7/2678 ,  H04B1/403 ,  H04W52/0293 ,  H04W56/00 ,  Y02D70/1222 ,  Y02D70/40 ,  Y02D70/449

摘要： A timing system is disclosed for use in a wireless communication system that includes wireless transceiver and a digital baseband processing system. The timing system includes a primary clock generation system that provides a low frequency clock that is used as the reference clock for a digital signal processing system, which generates low frequency timing signals, and a secondary clock generation system that provides a high frequency clock that is used by the wireless transceiver to produce high resolution timing signals to control the timing of the wireless transceiver. The high resolution timing signals are commenced responsive to a low resolution timing signal.

摘要翻译： 公开了一种在包括无线收发器和数字基带处理系统的无线通信系统中使用的定时系统。 定时系统包括主时钟发生系统，其提供用作产生低频定时信号的数字信号处理系统的参考时钟的低频时钟，以及提供高频时钟的次时钟生成系统， 由无线收发器使用以产生高分辨率定时信号以控制无线收发器的定时。 高分辨率定时信号响应于低分辨率定时信号而开始。

公开(公告)号：US08929344B2

公开(公告)日：2015-01-06

申请号：US13314159

申请日：2011-12-07

申请人： Yonggang Hao ,  Jianwei Zhang ,  Aiguo Yan ,  Songsong Sun

发明人： Yonggang Hao ,  Jianwei Zhang ,  Aiguo Yan ,  Songsong Sun

IPC分类号： H04B7/216 ,  H04L25/02

CPC分类号： H04L25/0204 ,  H04L25/0212 ,  H04L25/0216 ,  H04L25/0238

摘要： Blind channel impulse response combining for noise mitigation in channel estimation in a TD-SCDMA receiver includes applying a correlation function to pairs of channel impulse response windows associated with non-desired user equipments, grouping all those channel impulse response windows having a correlation function above a predetermined threshold as identified with the same user equipment, and combining the channel estimation results from each identified user equipment in the group to mitigate noise.

摘要翻译： 用于TD-SCDMA接收机的信道估计中用于噪声抑制的盲信道脉冲响应组合包括将相关函数应用于与非期望用户设备相关联的信道脉冲响应窗口对，将具有高于1的相关函数的所有那些信道脉冲响应窗口分组 用相同的用户设备识别的预定阈值，以及组合来自组中每个识别的用户设备的信道估计结果以减轻噪声。

公开(公告)号：US08711986B2

公开(公告)日：2014-04-29

申请号：US13235462

申请日：2011-09-18

申请人： Aiguo Yan ,  Yonggang Hao ,  Marko Kocic

发明人： Aiguo Yan ,  Yonggang Hao ,  Marko Kocic

IPC分类号： H04L27/06 ,  H04B1/10

CPC分类号： H04L25/0212 ,  H04L25/03038 ,  H04L25/03834

摘要： A communication system is provided that includes a composite transfer module that receives an input signal and performs one or more selective operations defined by a first transfer function on the input signal. The composite transfer module outputs a first signal. A joint detection module receives the first signal and performs joint detection on the first signal. The joint detection module utilizes channel estimation information of the first transfer function so as to allow the joint detection module to perform joint detection with an oversampling rate of 2× or higher.

摘要翻译： 提供了一种通信系统，其包括复合传送模块，其接收输入信号并执行由输入信号上的第一传递函数定义的一个或多个选择性操作。 复合传送模块输出第一信号。 联合检测模块接收第一信号并对第一信号进行联合检测。 联合检测模块利用第一传递函数的信道估计信息，以使联合检测模块以2×以上的过采样率进行联合检测。

公开(公告)号：US20130094476A1

公开(公告)日：2013-04-18

申请号：US13314159

申请日：2011-12-07

申请人： Yonggang Hao ,  Jianwei Zhang ,  Aiguo Yan ,  Songsong Sun

发明人： Yonggang Hao ,  Jianwei Zhang ,  Aiguo Yan ,  Songsong Sun

IPC分类号： H04B7/216 ,  H04W72/04 ,  H04J13/00

CPC分类号： H04L25/0204 ,  H04L25/0212 ,  H04L25/0216 ,  H04L25/0238

摘要： Blind channel impulse response combining for noise mitigation in channel estimation in a TD-SCDMA receiver includes applying a correlation function to pairs of channel impulse response windows associated with non-desired user equipments, grouping all those channel impulse response windows having a correlation function above a predetermined threshold as identified with the same user equipment, and combining the channel estimation results from each identified user equipment in the group to mitigate noise.

摘要翻译： 用于TD-SCDMA接收机的信道估计中用于噪声抑制的盲信道脉冲响应组合包括将相关函数应用于与非期望用户设备相关联的信道脉冲响应窗口对，将具有高于1的相关函数的所有那些信道脉冲响应窗口分组 用相同的用户设备识别的预定阈值，以及组合来自组中每个识别的用户设备的信道估计结果以减轻噪声。

公开(公告)号：US08358988B2

公开(公告)日：2013-01-22

申请号：US11529146

申请日：2006-09-28

申请人： Lidwine Martinot ,  Deepak Mathew ,  Krishnan Vishwanathan ,  Eric Aardoom ,  Aiguo Yan ,  Timothy Fisher-Jeffes

发明人： Lidwine Martinot ,  Deepak Mathew ,  Krishnan Vishwanathan ,  Eric Aardoom ,  Aiguo Yan ,  Timothy Fisher-Jeffes

IPC分类号： H04B1/18

CPC分类号： H04B1/7105 ,  H04B2201/70707

摘要： A bit rate processor in a wireless system includes a front end processor to process physical channel data and to generate encoded transport channel data, a transport channel buffer to hold the encoded transport channel data, and a back end processor to process the encoded transport channel data from the transport channel buffer and to generate decoded transport channel bits. The front end process may include a frame buffer that receives the physical channel data, a first stage to de-map the physical channel data, an intermediate frame buffer that receives the de-mapped physical channel data, and a second stage to process the de-mapped physical channel data and to provide the encoded transport channel data. The back end processor may include a third stage, including a scaling circuit to scale the encoded transport channel data, a decoder to decode the scaled transport channel data, a CRC checker and an output buffer.

摘要翻译： 无线系统中的比特率处理器包括用于处理物理信道数据并生成编码的传输信道数据的前端处理器，用于保存经编码的传输信道数据的传输信道缓冲器和用于处理编码的传输信道数据的后端处理器 并且生成解码的传输信道位。 前端处理可以包括接收物理信道数据的帧缓冲器，去映射物理信道数据的第一级，接收去映射物理信道数据的中间帧缓冲器，以及处理该去映射物理信道数据的第二级 并且提供编码的传输信道数据。 后端处理器可以包括第三级，包括缩放所编码的传输信道数据的缩放电路，解码器以解码缩放的传输信道数据，CRC校验器和输出缓冲器。

公开(公告)号：US07916841B2

公开(公告)日：2011-03-29

申请号：US11545857

申请日：2006-10-11

申请人： Aiguo Yan ,  Lidwine Martinot ,  Marko Kocic ,  Paul D. Krivacek ,  Thomas J. Barber, Jr. ,  John Zijun Shen

发明人： Aiguo Yan ,  Lidwine Martinot ,  Marko Kocic ,  Paul D. Krivacek ,  Thomas J. Barber, Jr. ,  John Zijun Shen

IPC分类号： H04M1/64 ,  H04L25/49

CPC分类号： H04B1/7105 ,  H04B2201/70711

摘要： A joint detection system and associated methods are provided. The joint detection system is configured to perform joint detection of received signals and includes a joint detector accelerator and a programmable digital signal processor (DSP). The joint detector accelerator is configured to perform front-end processing of first data inputted to the joint detector accelerator and output second data resulting from the front-end processing. The joint detector accelerator is further configured to perform back-end processing using at least third data inputted to the joint detector accelerator. The programmable DSP is coupled to the joint detector accelerator, and the programmable DSP is programmed to perform at least one intermediate processing operation using the second data outputted by the joint detector accelerator. The programmable DSP is further programmed to output the third data resulting from the intermediate processing operation to the joint detector accelerator.

摘要翻译： 提供联合检测系统及相关方法。 联合检测系统被配置为执行接收信号的联合检测，并且包括联合检测器加速器和可编程数字信号处理器（DSP）。 联合检测器加速器被配置为执行输入到联合检测器加速器的第一数据的前端处理，并输出从前端处理得到的第二数据。 联合检测器加速器还被配置为使用输入到联合检测器加速器的至少第三数据来执行后端处理。 可编程DSP耦合到联合检测器加速器，并且可编程DSP被编程为使用由联合检测器加速器输出的第二数据执行至少一个中间处理操作。 可编程DSP进一步编程为将由中间处理操作产生的第三数据输出到联合检测器加速器。

公开(公告)号：US07379752B2

公开(公告)日：2008-05-27

申请号：US10964576

申请日：2004-10-13

申请人： Aiguo Yan

发明人： Aiguo Yan

IPC分类号： H04M1/00 ,  H04Q7/20

CPC分类号： H04L27/0008 ,  H04B1/406 ,  H04W88/06

摘要： One embodiment of the invention is directed to operating, in a wireless network, a device that is designed for operation in a different wireless network. In one embodiment, a device designed to operate in a GSM wireless network may be used to communicate in a PHS wireless network.

摘要翻译： 本发明的一个实施例涉及在无线网络中操作被设计用于在不同无线网络中操作的设备。 在一个实施例中，设计为在GSM无线网络中操作的设备可以用于在PHS无线网络中进行通信。

公开(公告)号：US20080089448A1

公开(公告)日：2008-04-17

申请号：US11546062

申请日：2006-10-11

申请人： Lidwine Martinot ,  Aiguo Yan ,  Marko Kocic ,  Thomas J. Barber ,  John Zijun Shen

发明人： Lidwine Martinot ,  Aiguo Yan ,  Marko Kocic ,  Thomas J. Barber ,  John Zijun Shen

IPC分类号： H04L27/06

CPC分类号： H04B1/7105 ,  H04B2201/70707 ,  H04L25/0224

摘要： A joint detection system and associated methods are provided. A joint detection system is configured to perform joint detection of received signals. The joint detection system includes a joint detector accelerator configured to perform an operation of the joint detection of the received signals, wherein the joint detection includes computing joint detection variables. The operation includes a multiply and accumulate operation resulting in a value in an accumulator, and the value in the accumulator includes a plurality of bits. The joint detector accelerator is configured to select a subset of bits of the plurality of bits of the value in the accumulator, where the subset of bits selected is configurable. The joint detector accelerator is further configured to store the subset of bits into a memory as a fixed point representation.

摘要翻译： 提供联合检测系统及相关方法。 联合检测系统被配置为执行接收信号的联合检测。 联合检测系统包括联合检测器加速器，其被配置为执行对接收信号的联合检测的操作，其中联合检测包括计算关节检测变量。 该操作包括产生累加器中的值的乘法和累加运算，累加器中的值包括多个位。 联合检测器加速器被配置为选择累加器中的值的多个比特的子集，其中选择的比特的子集是可配置的。 联合检测器加速器还被配置为将位的子集存储到存储器中作为固定点表示。

公开(公告)号：US20080081575A1

公开(公告)日：2008-04-03

申请号：US11529071

申请日：2006-09-28

申请人： Deepak Mathew ,  Aiguo Yan ,  Krishnan Vishwanathan ,  Eric Aardoom ,  Timothy Fisher-Jeffes

发明人： Deepak Mathew ,  Aiguo Yan ,  Krishnan Vishwanathan ,  Eric Aardoom ,  Timothy Fisher-Jeffes

IPC分类号： H04B1/18

CPC分类号： H04B1/707 ,  H04L1/0045 ,  H04L1/0071

摘要： A bit rate processor in a wireless system includes a front end processor to process physical channel data and to generate encoded transport channel data, a transport channel buffer to hold the encoded transport channel data, and a back end processor to process the encoded transport channel data from the transport channel buffer and to generate decoded transport channel bits. The front end process may include a frame buffer that receives the physical channel data, a first stage to de-map the physical channel data from the frame buffer, an intermediate frame buffer that receives the de-mapped physical channel data from the first stage, and a second stage to process the de-mapped physical channel data and to provide the encoded transport channel data. The back end processor may include a third stage, including a scaling circuit to scale the encoded transport channel data, a decoder to decode the scaled transport channel data and a CRC checker to provide the decoded transport channel bits, and an output buffer to receive the decoded transport channel bits.

摘要翻译： 无线系统中的比特率处理器包括用于处理物理信道数据并生成编码的传输信道数据的前端处理器，用于保存经编码的传输信道数据的传输信道缓冲器和用于处理编码的传输信道数据的后端处理器 并且生成解码的传输信道位。 前端处理可以包括接收物理信道数据的帧缓冲器，从帧缓冲器去映射物理信道数据的第一级，从第一级接收去映射物理信道数据的中间帧缓冲器， 以及第二级，用于处理去映射的物理信道数据并提供经编码的传输信道数据。 后端处理器可以包括第三级，包括缩放经编码的传输信道数据的缩放电路，解码器以解码缩放的传输信道数据和CRC校验器以提供解码的传输信道位，以及输出缓冲器，用于接收 解码的传输信道位。