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    REDUCING TRANSISTOR JUNCTION CAPACITANCE BY RECESSING DRAIN AND SOURCE REGIONS
    1.
    发明申请
    REDUCING TRANSISTOR JUNCTION CAPACITANCE BY RECESSING DRAIN AND SOURCE REGIONS 有权
    通过记录漏水和源区域降低晶体管结点电容

    公开(公告)号：US20100237431A1

    公开(公告)日：2010-09-23

    申请号：US12791290

    申请日：2010-06-01

    申请人： Thomas Feudel ,  Markus Lenski ,  Andreas Gehring

    发明人： Thomas Feudel ,  Markus Lenski ,  Andreas Gehring

    IPC分类号： H01L27/092 ,  H01L21/336 ,  H01L21/8238

    CPC分类号： H01L21/324 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/41733 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/7848 ,  H01L29/78621

    摘要： By recessing portions of the drain and source areas on the basis of a spacer structure, the subsequent implantation process for forming the deep drain and source regions may result in a moderately high dopant concentration extending down to the buried insulating layer of an SOI transistor. Furthermore, the spacer structure maintains a significant amount of a strained semiconductor alloy with its original thickness, thereby providing an efficient strain-inducing mechanism. By using sophisticated anneal techniques, undue lateral diffusion may be avoided, thereby allowing a reduction of the lateral width of the respective spacers and thus a reduction of the length of the transistor devices. Hence, enhanced charge carrier mobility in combination with reduced junction capacitance may be accomplished on the basis of reduced lateral dimensions.

    摘要翻译： 通过基于间隔结构凹陷漏极和源极区域的部分，用于形成深漏极和源极区域的后续注入工艺可导致向下延伸到SOI晶体管的掩埋绝缘层的适度高的掺杂剂浓度。 此外，间隔结构保持大量的具有其原始厚度的应变半导体合金，从而提供有效的应变诱导机制。 通过使用复杂的退火技术，可以避免不适当的横向扩散，从而允许减小各个间隔物的横向宽度，从而减小晶体管器件的长度。 因此，可以基于减小的横向尺寸来实现增强的载流子迁移率与减少的结电容的组合。

    REDUCING TRANSISTOR JUNCTION CAPACITANCE BY RECESSING DRAIN AND SOURCE REGIONS
    2.
    发明申请
    REDUCING TRANSISTOR JUNCTION CAPACITANCE BY RECESSING DRAIN AND SOURCE REGIONS 有权
    通过记录漏水和源区域降低晶体管结点电容

    公开(公告)号：US20090001484A1

    公开(公告)日：2009-01-01

    申请号：US12027583

    申请日：2008-02-07

    申请人： Thomas Feudel ,  Markus Lenski ,  Andreas Gehring

    发明人： Thomas Feudel ,  Markus Lenski ,  Andreas Gehring

    IPC分类号： H01L29/00 ,  H01L21/8236

    CPC分类号： H01L21/324 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/41733 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/7848 ,  H01L29/78621

    摘要： By recessing portions of the drain and source areas on the basis of a spacer structure, the subsequent implantation process for forming the deep drain and source regions may result in a moderately high dopant concentration extending down to the buried insulating layer of an SOI transistor. Furthermore, the spacer structure maintains a significant amount of a strained semiconductor alloy with its original thickness, thereby providing an efficient strain-inducing mechanism. By using sophisticated anneal techniques, undue lateral diffusion may be avoided, thereby allowing a reduction of the lateral width of the respective spacers and thus a reduction of the length of the transistor devices. Hence, enhanced charge carrier mobility in combination with reduced junction capacitance may be accomplished on the basis of reduced lateral dimensions.

    摘要翻译： 通过基于间隔结构凹陷漏极和源极区域的部分，用于形成深漏极和源极区域的后续注入工艺可导致向下延伸到SOI晶体管的掩埋绝缘层的适度高的掺杂剂浓度。 此外，间隔结构保持大量的具有其原始厚度的应变半导体合金，从而提供有效的应变诱导机制。 通过使用复杂的退火技术，可以避免不适当的横向扩散，从而允许减小各个间隔物的横向宽度，从而减小晶体管器件的长度。 因此，可以基于减小的横向尺寸来实现增强的载流子迁移率与减少的结电容的组合。