Bipolar transistor structure with self-aligned raised extrinsic base and methods
    1.
    发明授权
    Bipolar transistor structure with self-aligned raised extrinsic base and methods 有权
    双极晶体管结构具有自对准引出的外在基极和方法

    公开(公告)号:US07037798B2

    公开(公告)日:2006-05-02

    申请号:US10904482

    申请日:2004-11-12

    IPC分类号: H01L21/331

    摘要: The invention includes methods of fabricating a bipolar transistor that adds a silicon germanium (SiGe) layer or a third insulator layer of, e.g., high pressure oxide (HIPOX), atop an emitter cap adjacent the intrinsic base prior to forming a link-up layer. This addition allows for removal of the link-up layer using wet etch chemistries to remove the excess SiGe or third insulator layer formed atop the emitter cap without using oxidation. In this case, an oxide section (formed by deposition of an oxide or segregation of the above-mentioned HIPOX layer) and nitride spacer can be used to form the emitter-base isolation. The invention results in lower thermal cycle, lower stress levels, and more control over the emitter cap layer thickness, which are drawbacks of the first embodiment. The invention also includes the resulting bipolar transistor structure.

    摘要翻译: 本发明包括制造双极晶体管的方法,该双极晶体管在形成连接层之前,将硅锗(SiGe)层或例如高压氧化物(HIPOX)的第三绝缘体层与邻近本征基极的发射极帽顶上相加 。 该添加允许使用湿蚀刻化学去除连接层,以去除在不使用氧化的情况下形成在发射极帽顶上的多余SiGe或第三绝缘体层。 在这种情况下,可以使用氧化物部分(通过沉积氧化物或上述HIPOX层的分离)和氮化物间隔物形成发射极 - 基极隔离。 本发明导致较低的热循环,较低的应力水平和对发射极盖层厚度的更多控制,这是第一实施例的缺点。 本发明还包括所得到的双极晶体管结构。

    Structure and method for making heterojunction bipolar transistor having self-aligned silicon-germanium raised extrinsic base
    3.
    发明授权
    Structure and method for making heterojunction bipolar transistor having self-aligned silicon-germanium raised extrinsic base 失效
    用于制造具有自对准硅 - 锗的异质结双极晶体管的结构和方法引起的外在基极

    公开(公告)号:US06982442B2

    公开(公告)日:2006-01-03

    申请号:US10707712

    申请日:2004-01-06

    IPC分类号: H01L29/737

    摘要: A heterojunction bipolar transistor (HBT) and method of making an HBT are provided. The HBT includes a collector, and an intrinsic base overlying the collector. The intrinsic base includes a layer of a single-crystal semiconductor alloy. The HBT further includes a raised extrinsic base having a first semiconductive layer overlying the intrinsic base and a second semiconductive layer formed on the first semiconductive layer. An emitter overlies the intrinsic base, and is disposed in an opening of the first and second semiconductive layers, such that the raised extrinsic base is self-aligned to the emitter.

    摘要翻译: 提供异质结双极晶体管(HBT)和制造HBT的方法。 HBT包括收集器和覆盖收集器的本征基极。 本征基底包括一层单晶半导体合金。 HBT还包括凸起的非本征基底,其具有覆盖本征基底的第一半导体层和形成在第一半导体层上的第二半导体层。 发射极覆盖本征基极,并且设置在第一和第二半导体层的开口中,使得凸出的外基极与发射极自对准。

    Self-aligned raised extrinsic base bipolar transistor structure and method
    4.
    发明授权
    Self-aligned raised extrinsic base bipolar transistor structure and method 失效
    自对准凸极本征双极晶体管结构及方法

    公开(公告)号:US06869852B1

    公开(公告)日:2005-03-22

    申请号:US10707756

    申请日:2004-01-09

    摘要: A method of fabricating a bipolar transistor structure that provides unit current gain frequency (fT) and maximum oscillation frequency (fMAX) improvements of a raised extrinsic base using non-self-aligned techniques to establish a self-aligned structure. Accordingly, the invention eliminates the complexity and cost of current self-aligned raised extrinsic base processes. The invention forms a raised extrinsic base and an emitter opening over a landing pad, i.e., etch stop layer, then replaces the landing pad with a conductor that is converted, in part, to an insulator. An emitter is then formed in the emitter opening once the insulator is removed from the emitter opening. An unconverted portion of the conductor provides a conductive base link and a remaining portion of the insulator under a spacer isolates the extrinsic base from the emitter while maintaining self-alignment of the emitter to the extrinsic base. The invention also includes the resulting bipolar transistor structure.

    摘要翻译: 一种制造双极晶体管结构的方法,其使用非自对准技术建立自对准结构来提供升高的外部基极的单位电流增益频率(fT)和最大振荡频率(fMAX)改善。 因此,本发明消除了当前自对准引起的外在基本过程的复杂性和成本。 本发明形成凸起的非本征基极和在着陆焊盘(即,蚀刻停止层)上开口的发射体,然后用部分转换为绝缘体的导体代替着陆焊盘。 一旦绝缘体从发射极开口移除,就在发射极开口中形成发射极。 导体的未转换部分提供导电基极连接,并且在间隔物下方的绝缘体的剩余部分将外部基极与发射极隔离,同时保持发射极到外部基极的自对准。 本发明还包括所得到的双极晶体管结构。

    Bipolar transistor with collector having an epitaxial Si:C region
    5.
    发明授权
    Bipolar transistor with collector having an epitaxial Si:C region 失效
    具有集电极的双极晶体管具有外延Si:C区域

    公开(公告)号:US07442595B2

    公开(公告)日:2008-10-28

    申请号:US11511047

    申请日:2006-08-28

    IPC分类号: H01L21/337

    摘要: A structure and method where C is incorporated into the collector region of a heterojunction bipolar device by a method which does not include C ion implantation are provided. In the present invention, C is incorporated into the collector by epitaxy in a perimeter trench etched into the collector region to better control the carbon profile and location. The trench is formed by etching the collector region using the trench isolation regions and a patterned layer over the center part of the collector as masks. Then, Si:C is grown using selective epitaxy inside the trench to form a Si:C region with sharp and well-defined edges. The depth, width and C content can be optimized to control and tailor the collector implant diffusion and to reduce the perimeter component of parasitic CCB.

    摘要翻译: 提供了通过不包括C离子注入的方法将C并入到异质结双极器件的集电极区域中的结构和方法。 在本发明中,通过在刻蚀到集电极区域的周边沟槽中外延生长将C引入集电体,以更好地控制碳分布和位置。 通过使用沟槽隔离区域将集电极区域和在集电体的中心部分上的图案化层作为掩模来形成沟槽。 然后,使用沟槽内部的选择性外延生长Si:C以形成具有清晰且明确界定的边缘的Si:C区域。 可以优化深度,宽度和C含量以控制和定制集电极注入扩散并减少寄生C CB的周边分量。

    METHODS TO IMPROVE THE SiGe HETEROJUNCTION BIPOLAR DEVICE PERFORMANCE
    6.
    发明申请
    METHODS TO IMPROVE THE SiGe HETEROJUNCTION BIPOLAR DEVICE PERFORMANCE 失效
    改善SiGe异性双极性器件性能的方法

    公开(公告)号:US20080128861A1

    公开(公告)日:2008-06-05

    申请号:US11555906

    申请日:2006-11-02

    IPC分类号: H01L29/73

    摘要: Methods of boosting the performance of bipolar transistor, especially SiGe heterojunction bipolar transistors, is provided together with the structure that is formed by the inventive methods. The methods include providing a species-rich dopant region comprising C, a noble gas, or mixtures thereof into at least a collector. The species-rich dopant region forms a perimeter or donut-shaped dopant region around a center portion of the collector. A first conductivity type dopant is then implanted into the center portion of the collector to form a first conductivity type dopant region that is laterally constrained, i.e., confined, by the outer species-rich dopant region.

    摘要翻译: 提供双极晶体管,特别是SiGe异质结双极晶体管的性能的方法与通过本发明方法形成的结构一起提供。 所述方法包括向至少一个收集器提供包含C,惰性气体或其混合物的富含物质的掺杂剂区域。 富含物质的掺杂剂区域围绕收集器的中心部分形成周边或环形掺杂剂区域。 然后将第一导电型掺杂剂注入到集电极的中心部分中,以形成由外部富物质掺杂区域横向约束,即限制的第一导电型掺杂剂区域。

    Methods to improve the SiGe heterojunction bipolar device performance
    7.
    发明授权
    Methods to improve the SiGe heterojunction bipolar device performance 失效
    改善SiGe异质结双极器件性能的方法

    公开(公告)号:US07476914B2

    公开(公告)日:2009-01-13

    申请号:US11555906

    申请日:2006-11-02

    IPC分类号: H01L21/331

    摘要: Methods of boosting the performance of bipolar transistor, especially SiGe heterojunction bipolar transistors, is provided together with the structure that is formed by the inventive methods. The methods include providing a species-rich dopant region comprising C, a noble gas, or mixtures thereof into at least a collector. The species-rich dopant region forms a perimeter or donut-shaped dopant region around a center portion of the collector. A first conductivity type dopant is then implanted into the center portion of the collector to form a first conductivity type dopant region that is laterally constrained, i.e., confined, by the outer species-rich dopant region.

    摘要翻译: 提供双极晶体管,特别是SiGe异质结双极晶体管的性能的方法与通过本发明方法形成的结构一起提供。 所述方法包括向至少一个收集器提供包含C,惰性气体或其混合物的富含物质的掺杂剂区域。 富含物质的掺杂剂区域围绕收集器的中心部分形成周边或环形掺杂剂区域。 然后将第一导电型掺杂剂注入到集电极的中心部分中,以形成由外部富物质掺杂区域横向约束,即限制的第一导电型掺杂剂区域。

    Bipolar transistor with collector having an epitaxial Si:C region
    8.
    发明授权
    Bipolar transistor with collector having an epitaxial Si:C region 有权
    具有集电极的双极晶体管具有外延Si:C区域

    公开(公告)号:US07170083B2

    公开(公告)日:2007-01-30

    申请号:US10905510

    申请日:2005-01-07

    IPC分类号: H01L29/06

    摘要: A structure and method where C is incorporated into the collector region of a heterojunction bipolar device by a method which does not include C ion implantation are provided. In the present invention, C is incorporated into the collector by epitaxy in a perimeter trench etched into the collector region to better control the carbon profile and location. The trench is formed by etching the collector region using the trench isolation regions and a patterned layer over the center part of the collector as masks. Then, Si:C is grown using selective epitaxy inside the trench to form a Si:C region with sharp and well-defined edges. The depth, width and C content can be optimized to control and tailor the collector implant diffusion and to reduce the perimeter component of parasitic CCB.

    摘要翻译: 提供了通过不包括C离子注入的方法将C并入到异质结双极器件的集电极区域中的结构和方法。 在本发明中,通过在刻蚀到集电极区域的周边沟槽中外延生长将C引入集电体,以更好地控制碳分布和位置。 通过使用沟槽隔离区域将集电极区域和在集电体的中心部分上的图案化层作为掩模来形成沟槽。 然后,使用沟槽内部的选择性外延生长Si:C以形成具有清晰且明确界定的边缘的Si:C区域。 可以优化深度,宽度和C含量以控制和定制集电极注入扩散并减少寄生C CB的周边分量。