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14 条记录 (耗时 0.018 秒)

    Method and apparatus for fault detection in a resistive bridge sensor
    2.
    发明授权
    Method and apparatus for fault detection in a resistive bridge sensor 失效

    公开(公告)号：US06646446B2

    公开(公告)日：2003-11-11

    申请号：US09952257

    申请日：2001-09-14

    申请人： Thomas R. Maher ,  David L. Corkum

    发明人： Thomas R. Maher ,  David L. Corkum

    IPC分类号： G01R1710

    CPC分类号： G01R17/10 ,  G01R31/2829

    摘要： A full Wheatstone bridge sensor has conditioning electronics of an ASIC connected thereto. Two independently controlled diagnostic switches (S1, S2) in the ASIC are commonly connected to one of the bridge output nodes. The first diagnostic switch connects first resistor between the bridge output node and bridge supply voltage and the second diagnostic switch connects a second resistor between the bridge output and bridge ground. The first diagnostic switch closes during a first diagnostic waveform phase and opens during all other phases of operation. The second diagnostic switch closes during a second and third waveform phase and opens during all other phases of operation. The diagnostic waveforms are used to test major signal conditioning and fault reporting paths of the ASIC.

    Variable condition responsive sense system and method
    3.
    发明授权
    Variable condition responsive sense system and method 有权
    变量响应感知系统和方法

    公开(公告)号：US07031863B2

    公开(公告)日：2006-04-18

    申请号：US10743363

    申请日：2003-12-22

    申请人： Thomas R. Maher ,  David L. Corkum

    发明人： Thomas R. Maher ,  David L. Corkum

    IPC分类号： G01C19/00

    CPC分类号： G01D3/022 ,  G01D3/0365

    摘要： Signal conditioning of multiple sense elements is shown for providing information to a system requiring high accuracy and robust fault coverage. A first signal conditioning ASIC (10) pre-conditions the sense element data and a second system control ASIC (14) mathematically solves predetermined compensation relations based on the output of ASIC (10) and stored compensation data to fully condition the sensor output signal(s). The sense elements (1–6) are each formed by two half bridges whose inputs are pre-conditioned by separate, identical signal conditioning paths to provide highly accurate sense and diagnostic information.

    摘要翻译： 示出了多个感测元件的信号调理，用于向需要高精度和鲁棒故障覆盖的系统提供信息。 第一信号调节ASIC（10）预处理感测元件数据，并且第二系统控制ASIC（14）基于ASIC（10）的输出和存储的补偿数据在数学上解决预定的补偿关系以完全调节传感器输出信号 s）。 感测元件（1-6）各由两个半桥形成，两个半桥的输入通过单独的相同的信号调节路径进行预处理，以提供高精度的感测和诊断信息。

    Low cost asic architecture for safety critical applications monitoring an applied stimulus
    5.
    发明授权
    Low cost asic architecture for safety critical applications monitoring an applied stimulus 有权
    用于监控应用刺激的安全关键应用的低成本asic架构

    公开(公告)号：US06765391B2

    公开(公告)日：2004-07-20

    申请号：US10277797

    申请日：2002-10-22

    申请人： David L. Corkum ,  Keith W. Kawate ,  Thomas R. Maher

    发明人： David L. Corkum ,  Keith W. Kawate ,  Thomas R. Maher

    IPC分类号： G01R2702

    CPC分类号： G01R17/10

    摘要： An ASIC (14, 14′, 14″) conditions two independent outputs (VINM, VINP) of a full Wheatstone piezoresistive bridge (12) in separate conditioning paths. Each path is provided with a bridge supply voltage (VHB1, VHB2) which can serve as a temperature related input signal to respective offset and gain compensation control circuits. The half bridge outputs are inputted to respective amplifiers (U1, U2) along with a selected percentage of the temperature dependent bridge supply voltage. The outputs of the amplifiers provide a signal proportional to respective half bridge output voltage. In one embodiment, the output of the amplifier (U2) in one conditioning path of one half bridge is connected to the input of an amplifier (U4) in the other conditioning path to provide a signal in the one path proportional to the Wheatstone bridge differential output voltage and in the other path a signal proportional to the Wheatstone half bridge output voltage. In another embodiment, the temperature dependent bridge supply voltage is multiplexed for a selected time upon power-up to an amplifier (U5) which normally receives an input from one of the bridge outputs.

    摘要翻译： 在独立的调节路径中，ASIC（14,14'，14“）在完整的惠斯登压阻电桥（12）处理两个独立的输出（VINM，VINP）。 每个路径都有一个桥接电源电压（VHB1，VHB2），它可以作为相关偏移和增益补偿控制电路的温度相关输入信号。 半桥输出与温度依赖电桥电源电压的选定百分比一起输入到相应的放大器（U1，U2）。 放大器的输出提供与各个半桥输出电压成比例的信号。 在一个实施例中，在一个半桥的一个调节路径中的放大器（U2）的输出连接到另一个调节路径中的放大器（U4）的输入，以在与惠斯通电桥差分成比例的一个路径中提供信号 输出电压和另一路径上的信号成比例的惠斯通半桥输出电压。 在另一个实施例中，在上电至通常从桥接输出之一接收输入的放大器（U5）时，依赖于温度的电桥电压被复用一段选定的时间。

    Method and apparatus for in-range fault detection of condition responsive sensor
    6.
    发明授权
    Method and apparatus for in-range fault detection of condition responsive sensor 有权
    状态响应传感器的范围内故障检测方法和装置

    公开(公告)号：US06433554B1

    公开(公告)日：2002-08-13

    申请号：US09468260

    申请日：1999-12-20

    申请人： Keith W. Kawate ,  David L. Corkum ,  Thomas R. Maher

    发明人： Keith W. Kawate ,  David L. Corkum ,  Thomas R. Maher

    IPC分类号： G01R3100

    CPC分类号： G01D18/00 ,  G01D3/022 ,  G01D3/08

    摘要： An in-range fault detection system for a full wheatstone bridge element (12) having piezoresistive elements (R1, R2, R3, R4) has bridge outputs (INP, INM) connected to measuring means in the form of a first circuit portion (13) to provide a common mode voltage (VCM). A second circuit portion (14) is used to provide a centering voltage (C*VBRG) equal to the common mode voltage at the time of sensor calibration and a third circuit portion (15) is used to provide a small window voltage (W*VBRG) which is a fraction of bridge voltage. The value (W*VBRG) is subtracted from (C*VBRG) at a first summing circuit (SUM1) and added to (C*VBRG) at a second summing circuit (SUM2) and the results are each compared to the common mode voltage by comparators (Q1, Q2) which are then determined to be within or without a window of valid values by an OR gate (Q3).

    摘要翻译： 具有压阻元件（R1，R2，R3，R4）的全惠斯登电桥元件（12）的范围内故障检测系统具有连接到第一电路部分（13）形式的测量装置的桥接输出（INP，INM） ）以提供共模电压（VCM）。 第二电路部分（14）用于在传感器校准时提供等于共模电压的定心电压（C * VBRG），并且第三电路部分（15）用于提供小窗口电压（W * VBRG），这是桥电压的一小部分。 在第一求和电路（SUM1）从（C * VBRG）中减去值（W * VBRG），并在第二求和电路（SUM2）将其加到（C * VBRG），并将结果与​​共模电压 通过比较器（Q1，Q2），然后通过OR门（Q3）将其确定为在或不具有有效值的窗口内。

    Circuit designs for induced transient immunity
    7.
    发明授权
    Circuit designs for induced transient immunity 有权
    诱发瞬态免疫的电路设计

    公开(公告)号：US09401601B2

    公开(公告)日：2016-07-26

    申请号：US14095195

    申请日：2013-12-03

    申请人： Eric A. Wolf ,  David L. Corkum

    发明人： Eric A. Wolf ,  David L. Corkum

    IPC分类号： H02H1/00 ,  H02H1/04 ,  H02H3/22 ,  H02H9/06 ,  H02H9/04 ,  G01L19/00 ,  H03K17/16

    CPC分类号： H02H9/04 ,  G01L19/00 ,  H03K17/165

    摘要： A circuit for protecting a voltage supply to a sensor from a transient event is provided. The circuit includes at least one buffer capacitor configured to provide output during the transient event, the output substantially equivalent to output of a regulated supply during normal operation of the sensor. A method of fabrication and a sensor are disclosed.

    摘要翻译： 提供了一种用于保护传感器对瞬态事件的电压供应的电路。 该电路包括至少一个缓冲电容器，其被配置为在瞬态事件期间提供输出，该输出基本上等于在传感器的正常操作期间调节电源的输出。 公开了制造方法和传感器。

    Potentiometric DAC having improved ratiometric output voltage stability
    8.
    发明授权
    Potentiometric DAC having improved ratiometric output voltage stability 失效
    电位计DAC具有改进的比例输出电压稳定性

    公开(公告)号：US06249239B1

    公开(公告)日：2001-06-19

    申请号：US09435299

    申请日：1999-11-05

    申请人： David L. Corkum

    发明人： David L. Corkum

    IPC分类号： H03M178

    CPC分类号： H03M1/0663 ,  H03M1/765

    摘要： A potentiometric digital to analog converter includes switches to electrically connect a string of n resistors between two voltage supplies to charge a first capacitor (C1) through a first tap and store the charge and then to reverse the electrical connections of the string to the two power supplies to charge a second capacitor (C2) through a second tap connected at an inverse location symmetrical about the average voltage of the voltages at the supply connectivity switches and store the charge of the second capacitor. The voltage (VA, VB) on the two capacitors is then averaged to provide a ratiometric output voltage which is insensitive to the drift of values of the string of resistors.

    摘要翻译： 电位数转换器包括用于在两个电压源之间电连接一组n个电阻器的开关，用于通过第一次抽头对第一电容器（C1）充电并存储电荷，然后将串的电连接反向到两个电源 用于通过连接在与供电连接开关处的电压的平均电压对称的反向位置处的第二抽头对第二电容器（C2）充电并存储第二电容器的电荷。 然后对两个电容器上的电压（VA，VB）进行平均，以提供对电阻串的值的漂移不敏感的比例输出电压。

    Image Stabilization System and Method for a Digital Camera
    9.
    发明申请
    Image Stabilization System and Method for a Digital Camera 审中-公开
    图像稳定系统和数码相机的方法

    公开(公告)号：US20080143840A1

    公开(公告)日：2008-06-19

    申请号：US11959718

    申请日：2007-12-19

    申请人： David L. Corkum ,  Aziz U. Batur ,  Douglas Strott ,  Leonardo Estevez

    发明人： David L. Corkum ,  Aziz U. Batur ,  Douglas Strott ,  Leonardo Estevez

    IPC分类号： H04N7/18

    CPC分类号： H04N5/23248 ,  H04N5/23277

    摘要： Deblurring digital camera images captured in low-light, long-integration-time conditions by capturing multiple short-integration images and fusing with on-the-fly motion estimation and alignment to limit the frame memory requirements. In one embodiment, an image stabilization system includes: (1) a frame memory and (2) a processor coupled to the frame memory and configured to store a first short-integration digital image in the frame memory, determine a displacement of a second short-integration digital image relative to the first short-integration digital image, combine the second short-integration digital image with the first short-integration digital image to form a fused digital image and overwrite the first short-integration digital image with the fused digital image.

    摘要翻译： 通过捕获多个短集成图像并通过即时运动估计和对准进行融合来限制帧存储器要求，从而在低光，长积分时间条件下捕获数字照相机图像。 在一个实施例中，图像稳定系统包括：（1）帧存储器和（2）耦合到帧存储器并被配置为将第一短积分数字图像存储在帧存储器中的处理器，确定第二短帧的位移 整合数字图像相对于第一短集成数字图像，将第二短集成数字图像与第一短集成数字图像组合以形成融合数字图像，并用融合数字图像覆盖第一短集成数字图像 。

    Electronically variable light attenuator
    10.
    发明授权
    Electronically variable light attenuator 有权
    电子可变光衰减器

    公开(公告)号：US06525860B1

    公开(公告)日：2003-02-25

    申请号：US09574357

    申请日：2000-05-18

    申请人： Michael Holz ,  David L. Corkum

    发明人： Michael Holz ,  David L. Corkum

    IPC分类号： G02F103

    CPC分类号： G02F1/1326 ,  G02F1/1393 ,  G02F1/292 ,  G02F1/2955 ,  G02F2001/133757 ,  G02F2201/305 ,  G02F2203/22 ,  G02F2203/48

    摘要： An electronically variable light attenuator and method for electronically attenuating light. The attenuator has an array of liquid crystal regions. The regions in a first set thereof are interspersed with the regions in a second set thereof. The array is adapted to receive a beam of light directed along an axis. A pair of electrodes is provided. At least one of the sets of regions is disposed between the electrodes. The regions in the first set are configured to produce a first diffraction pattern in response to the received light and the regions in the second set are configured to produce a second diffraction pattern in response to the received light. The pair of electrodes are arranged to enable the first and second diffraction patterns to combine with a degree of interference along an axis selected in accordance with an electric field produced between the pair of electrodes and through the at least one of the sets of regions. The array degree of interference is greatest in the absence of the electric field. With such an arrangement, a relatively low cost, high power, fail-safe, electronically variable light attenuator is provided.

    摘要翻译： 一种电子可变光衰减器和用于电子衰减光的方法。 衰减器具有液晶区域阵列。 其第一组中的区域与第二组中的区域分散。 阵列适于接收沿着轴指向的光束。 提供一对电极。 这些组中的至​​少一个设置在电极之间。 第一组中的区域被配置为响应于所接收的光产生第一衍射图案，并且第二组中的区域被配置为响应于接收的光产生第二衍射图案。 这对电极被布置成使得第一和第二衍射图案能够沿着沿着根据在一对电极之间产生的电场并通过该组区域中的至少一个而选择的轴线的一定程度的干涉来组合。 在没有电场的情况下，阵列的干扰程度最大。 通过这种布置，提供了相对低成本，高功率，故障安全的电子可变光衰减器。