METHODS OF FABRICATING A SEMICONDUCTOR IC HAVING A HARDENED SHALLOW TRENCH ISOLATION (STI)
    4.
    发明申请
    METHODS OF FABRICATING A SEMICONDUCTOR IC HAVING A HARDENED SHALLOW TRENCH ISOLATION (STI) 有权
    制造具有硬化的浅层分离分离(STI)的半导体IC的方法

    公开(公告)号:US20120329239A1

    公开(公告)日:2012-12-27

    申请号:US13167558

    申请日:2011-06-23

    IPC分类号: H01L21/762

    CPC分类号: H01L21/76224

    摘要: Methods and provided for fabricating a semiconductor IC having a hardened shallow trench isolation (STI). In accordance with one embodiment the method includes providing a semiconductor substrate and forming an etch mask having an opening exposing a portion the semiconductor substrate. The exposed portion is etched to form a trench extending into the semiconductor substrate and an oxide is deposited to at least partially fill the trench. At least the surface portion of the oxide is plasma nitrided to form a nitrided oxide layer and then the etch mask is removed.

    摘要翻译: 提供用于制造具有硬化浅沟槽隔离(STI)的半导体IC的方法。 根据一个实施例,该方法包括提供半导体衬底并形成具有暴露半导体衬底的一部分的开口的蚀刻掩模。 蚀刻暴露部分以形成延伸到半导体衬底中的沟槽,并且沉积氧化物以至少部分地填充沟槽。 至少氧化物的表面部分被等离子体氮化以形成氮化氧化物层,然后去除蚀刻掩模。

    Methods of fabricating a semiconductor IC having a hardened shallow trench isolation (STI)
    5.
    发明授权
    Methods of fabricating a semiconductor IC having a hardened shallow trench isolation (STI) 有权
    制造具有硬化浅沟槽隔离(STI)的半导体IC的方法

    公开(公告)号:US08569143B2

    公开(公告)日:2013-10-29

    申请号:US13167558

    申请日:2011-06-23

    IPC分类号: H01L21/762

    CPC分类号: H01L21/76224

    摘要: Methods and provided for fabricating a semiconductor IC having a hardened shallow trench isolation (STI). In accordance with one embodiment the method includes providing a semiconductor substrate and forming an etch mask having an opening exposing a portion the semiconductor substrate. The exposed portion is etched to form a trench extending into the semiconductor substrate and an oxide is deposited to at least partially fill the trench. At least the surface portion of the oxide is plasma nitrided to form a nitrided oxide layer and then the etch mask is removed.

    摘要翻译: 提供用于制造具有硬化浅沟槽隔离(STI)的半导体IC的方法。 根据一个实施例,该方法包括提供半导体衬底并形成具有暴露半导体衬底的一部分的开口的蚀刻掩模。 蚀刻暴露部分以形成延伸到半导体衬底中的沟槽,并且沉积氧化物以至少部分地填充沟槽。 至少氧化物的表面部分被等离子体氮化以形成氮化氧化物层,然后去除蚀刻掩模。

    Method for forming a self-aligned nitrogen-containing copper silicide capping layer in a microstructure device
    7.
    发明授权
    Method for forming a self-aligned nitrogen-containing copper silicide capping layer in a microstructure device 有权
    在微结构器件中形成自对准含氮铜硅化物封盖层的方法

    公开(公告)号:US07413985B2

    公开(公告)日:2008-08-19

    申请号:US11853994

    申请日:2007-09-12

    IPC分类号: H01L21/44

    摘要: By forming a copper/silicon/nitrogen alloy in a surface portion of a copper-containing region on the basis of a precursor layer, highly controllable and reliable process conditions may be established. The precursor layer may be formed on the basis of a liquid precursor solution, which may exhibit a substantially self-aligned and self-limiting deposition behavior.

    摘要翻译: 通过基于前体层在含铜区域的表面部分中形成铜/硅/氮合金,可以建立高度可控和可靠的工艺条件。 前体层可以基于液体前体溶液形成,其可以表现出基本上自对准和自限制的沉积行为。

    TECHNIQUE FOR REDUCING SILICIDE DEFECTS BY REDUCING DELETERIOUS EFFECTS OF PARTICLE BOMBARDMENT PRIOR TO SILICIDATION
    9.
    发明申请
    TECHNIQUE FOR REDUCING SILICIDE DEFECTS BY REDUCING DELETERIOUS EFFECTS OF PARTICLE BOMBARDMENT PRIOR TO SILICIDATION 失效
    减少硅胶缺陷的技术减少颗粒物料在硅胶上的破坏效应的技术

    公开(公告)号:US20070045226A1

    公开(公告)日:2007-03-01

    申请号:US11419540

    申请日:2006-05-22

    摘要: By reducing the effect of particle bombardment during the sequence for forming a metal silicide in semiconductor devices, the defect rate and the metal silicide uniformity may be enhanced. For this purpose, the metal may be deposited without an immediately preceding sputter etch process, wherein, in a particular embodiment, an additional oxidation process is performed to efficiently remove any silicon contaminations and surface impurities by a subsequent wet chemical treatment on the basis of HF, which is followed by the metal deposition.

    摘要翻译: 通过减少在半导体器件中形成金属硅化物的顺序期间的粒子轰击的影响,可以提高缺陷率和金属硅化物的均匀性。 为了这个目的,金属可以在没有紧接在前的溅射蚀刻工艺的情况下沉积,其中在特定实施例中,执行额外的氧化工艺以通过基于HF的随后的湿化学处理来有效地去除任何硅污染物和表面杂质 ,其后是金属沉积。

    TECHNIQUE FOR FORMING NICKEL SILICIDE BY DEPOSITING NICKEL FROM A GASEOUS PRECURSOR
    10.
    发明申请
    TECHNIQUE FOR FORMING NICKEL SILICIDE BY DEPOSITING NICKEL FROM A GASEOUS PRECURSOR 有权
    通过从气体前体沉积镍形成镍硅酸盐的技术

    公开(公告)号:US20070004203A1

    公开(公告)日:2007-01-04

    申请号:US11380085

    申请日:2006-04-25

    IPC分类号: H01L21/44 C23C16/16

    摘要: Nickel silicide is formed on the basis of a gaseous precursor, such as nickel tetra carbonyl, wherein the equilibrium of the decomposition of this gas may be controlled to obtain a highly selective nickel silicide formation rate. Moreover, any etch step for removing excess nickel may be avoided, since only minute amounts of nickel may form on exposed surfaces, which may then be effectively removed by correspondingly shifting the equilibrium. Consequently, reduced process complexity, enhanced controllability and enhanced tool lifetime may be obtained.

    摘要翻译: 镍硅化物基于气态前体如四羰基镍形成,其中可以控制该气体的分解平衡以获得高度选择性的硅化镍形成速率。 此外,可以避免用于去除过量镍的任何蚀刻步骤,因为在暴露的表面上只能形成微量的镍,然后可以通过相应地平衡平衡来有效地去除镍。 因此,可以获得降低的工艺复杂性,增强的可控性和增加的刀具寿命。