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公开(公告)号:US20250054809A1
公开(公告)日:2025-02-13
申请号:US18366492
申请日:2023-08-07
Applicant: Tokyo Electron Limited
Inventor: Kandabara Tapily , Subhadeep Kal , Peng Wang , Peter Biolsi
IPC: H01L21/768 , H01L21/311
Abstract: A method of processing a substrate that includes: forming a pattern of an electrically conductive layer over the substrate, the electrically conductive layer and a first dielectric layer being exposed at a surface of the substrate; selectively depositing a graphene layer over the electrically conductive layer relative to the first dielectric layer; selectively depositing a second dielectric layer over the first dielectric layer relative to the graphene layer; and depositing a third dielectric layer over the substrate, the third dielectric layer covering the second dielectric layer and the graphene layer.
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公开(公告)号:US20230317462A1
公开(公告)日:2023-10-05
申请号:US17690715
申请日:2022-03-09
Applicant: Tokyo Electron Limited
Inventor: Yun Han , Alok Ranjan , Tomoyuki Oishi , Shuhei Ogawa , Ken Kobayashi , Peter Biolsi
IPC: H01L21/3065 , H01L21/8234
CPC classification number: H01L21/3065 , H01L21/823431
Abstract: A method of processing a substrate that includes: performing a cyclic plasma etch process including a plurality of cycles, each of the plurality of cycles including: etching a patterning layer including a polycrystalline semiconductor material to form or extend a recess by exposing the substrate to a first plasma, the substrate including an oxide layer, the patterning layer formed over the oxide layer, exposing the substrate to a second plasma, the second plasma including dihydrogen, and extending the recess by exposing the substrate to a third plasma, the second plasma being different from the first plasma and the third plasma.
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公开(公告)号:US12300500B2
公开(公告)日:2025-05-13
申请号:US17690715
申请日:2022-03-09
Applicant: Tokyo Electron Limited
Inventor: Yun Han , Alok Ranjan , Tomoyuki Oishi , Shuhei Ogawa , Ken Kobayashi , Peter Biolsi
IPC: H01L21/3065 , H10D84/01 , H10D84/03
Abstract: A method of processing a substrate that includes: performing a cyclic plasma etch process including a plurality of cycles, each of the plurality of cycles including: etching a patterning layer including a polycrystalline semiconductor material to form or extend a recess by exposing the substrate to a first plasma, the substrate including an oxide layer, the patterning layer formed over the oxide layer, exposing the substrate to a second plasma, the second plasma including dihydrogen, and extending the recess by exposing the substrate to a third plasma, the second plasma being different from the first plasma and the third plasma.
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公开(公告)号:US12266533B2
公开(公告)日:2025-04-01
申请号:US17721620
申请日:2022-04-15
Applicant: TOKYO ELECTRON LIMITED
Inventor: Yun Han , Andrew Metz , Peter Biolsi
IPC: H01L21/306 , H01L21/02 , H01L21/3065 , H01L21/311 , H01L21/768 , H01L29/66
Abstract: A method which includes providing a substrate having a source/drain region and an etch stop layer on the source/drain region. A plasma etching process is performed using an etching gas that removes the etch stop layer and forms a sacrificial oxide capping layer on the source/drain region. The sacrificial oxide capping layer is then from the source/drain region.
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