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公开(公告)号:US20090050937A1
公开(公告)日:2009-02-26
申请号:US12257807
申请日:2008-10-24
IPC分类号: H01L29/778
CPC分类号: H01L29/66871 , H01L21/28 , H01L29/2003 , H01L29/42316 , H01L29/66462 , H01L29/7787 , H01L29/8128
摘要: A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.
摘要翻译: 本发明的半导体器件包括:III-V族氮化物半导体层,其包括载流子行进的沟道区; 设置在III-V族氮化物半导体层中的沟道区的上部的凹部; 和由形成与半导体层形成肖特基结的导电材料构成的肖特基电极,形成在III-V族氮化物半导体层上的在凹部的凹部和周边部分上方扩散的半导体层上。 深度方向上的凹部的尺寸被设定为使得设置在凹部中的肖特基电极的一部分可以调节在沟道区域中行进的载流子的量。
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公开(公告)号:US20100207165A1
公开(公告)日:2010-08-19
申请号:US12769108
申请日:2010-04-28
IPC分类号: H01L29/812
CPC分类号: H01L29/7786 , H01L29/2003 , H01L29/66462
摘要: According to a method for fabricating a semiconductor device, a first semiconductor layer made of a first nitride semiconductor is formed over a substrate. Thereafter, a mask film covering part of the upper surface of the first semiconductor layer is selectively formed on the first semiconductor layer. A multilayer film, in which second and third nitride semiconductors having different band gaps are stacked, is selectively formed on the first semiconductor layer with the mask film used as a formation mask. On the multilayer film, an ohmic electrode is formed.
摘要翻译: 根据半导体器件的制造方法,在基板上形成由第一氮化物半导体构成的第一半导体层。 此后,在第一半导体层上选择性地形成覆盖第一半导体层的上表面的一部分的掩模膜。 选择性地在第一半导体层上形成具有不同带隙的第二和第三氮化物半导体的多层膜,其中掩模膜用作形成掩模。 在多层膜上形成欧姆电极。
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公开(公告)号:US20100129992A1
公开(公告)日:2010-05-27
申请号:US12695759
申请日:2010-01-28
IPC分类号: H01L21/20
CPC分类号: H01L29/66871 , H01L21/28 , H01L29/2003 , H01L29/42316 , H01L29/66462 , H01L29/7787 , H01L29/8128
摘要: A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.
摘要翻译: 本发明的半导体器件包括:III-V族氮化物半导体层,其包括载流子行进的沟道区; 设置在III-V族氮化物半导体层中的沟道区的上部的凹部; 和由形成与半导体层形成肖特基结的导电材料构成的肖特基电极,形成在III-V族氮化物半导体层上的在凹部的凹部和周边部分上方扩散的半导体层上。 深度方向上的凹部的尺寸被设定为使得设置在凹部中的肖特基电极的一部分可以调节在沟道区域中行进的载流子的量。
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公开(公告)号:US20100090250A1
公开(公告)日:2010-04-15
申请号:US12637240
申请日:2009-12-14
申请人: Tomohiro MURATA , Hiroaki Ueno , Hidetoshi Ishida , Tetsuzo Ueda , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda
发明人: Tomohiro MURATA , Hiroaki Ueno , Hidetoshi Ishida , Tetsuzo Ueda , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号: H01L29/205 , H01L29/772 , H01L29/06
CPC分类号: H01L29/7787 , H01L23/367 , H01L23/3677 , H01L29/2003 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.
摘要翻译: 半导体器件包括:半导体层; 形成在与半导体层接触的半导体层上的至少一个电极; 以及覆盖半导体层和电极的顶表面的至少一部分的钝化膜,以保护半导体层并由多个子膜形成。 钝化膜包括由氮化铝制成的第一子膜。
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公开(公告)号:US20080067546A1
公开(公告)日:2008-03-20
申请号:US11898958
申请日:2007-09-18
申请人: Tomohiro MURATA , Hiroaki UENO , Hidetoshi ISHIDA , Tetsuzo UEDA , Yasuhiro UEMOTO , Tsuyoshi TANAKA , Daisuke UEDA
发明人: Tomohiro MURATA , Hiroaki UENO , Hidetoshi ISHIDA , Tetsuzo UEDA , Yasuhiro UEMOTO , Tsuyoshi TANAKA , Daisuke UEDA
IPC分类号: H01L29/20
CPC分类号: H01L29/7787 , H01L23/367 , H01L23/3677 , H01L29/2003 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.
摘要翻译: 半导体器件包括:半导体层; 形成在与半导体层接触的半导体层上的至少一个电极; 以及覆盖半导体层和电极的顶表面的至少一部分的钝化膜,以保护半导体层并由多个子膜形成。 钝化膜包括由氮化铝制成的第一子膜。
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公开(公告)号:US20080237605A1
公开(公告)日:2008-10-02
申请号:US12058114
申请日:2008-03-28
申请人: Tomohiro MURATA , Masayuki KURODA , Tetsuzo UEDA
发明人: Tomohiro MURATA , Masayuki KURODA , Tetsuzo UEDA
IPC分类号: H01L29/778 , H01L21/336
CPC分类号: H01L29/155 , H01L29/2003 , H01L29/4175 , H01L29/432 , H01L29/513 , H01L29/66462 , H01L29/7786
摘要: A semiconductor device includes: a first semiconductor layer which is made of a first group III nitride semiconductor; a cap layer which is formed on the first semiconductor layer, which is made of a second group III nitride semiconductor, and which has an opening for exposing the first semiconductor layer; and a source electrode and a drain electrode which are formed on the cap layer so as to oppose to each other with the opening interposed. A gate electrode is formed on the bottom face of the opening with an insulating film interposed. The insulating film is formed on at least a part of the first semiconductor layer which is exposed through the opening.
摘要翻译: 半导体器件包括:由第一III族氮化物半导体制成的第一半导体层; 盖层,形成在由第二III族氮化物半导体制成的第一半导体层上,并且具有用于使第一半导体层露出的开口; 以及源极电极和漏极电极,其形成在盖层上,以便插入开口彼此相对。 在绝缘膜插入的开口的底面上形成栅电极。 绝缘膜形成在通过开口露出的第一半导体层的至少一部分上。
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