公开(公告)号：US20190189693A1

公开(公告)日：2019-06-20

申请号：US16282482

申请日：2019-02-22

Applicant: Toshiba Memory Corporation

Inventor： Yusuke KOBAYASHI ,  Yoshihisa IWATA ,  Takeshi SUGIMOTO

IPC: H01L27/24 ,  H01L23/528

CPC classification number: H01L27/2481 ,  H01L23/528 ,  H01L27/2436

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

公开(公告)号：US20180175111A1

公开(公告)日：2018-06-21

申请号：US15899465

申请日：2018-02-20

Applicant: Toshiba Memory Corporation

Inventor： Yusuke KOBAYASHI ,  Yoshihisa IWATA ,  Takeshi SUGIMOTO

IPC: H01L27/24 ,  H01L23/528

CPC classification number: H01L27/2481 ,  H01L23/528 ,  H01L27/2436

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

公开(公告)号：US20210384259A1

公开(公告)日：2021-12-09

申请号：US17407896

申请日：2021-08-20

Applicant: Toshiba Memory Corporation

Inventor： Yusuke KOBAYASHI ,  Yoshihisa IWATA ,  Takeshi SUGIMOTO

IPC: H01L27/24 ,  H01L23/528

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

公开(公告)号：US20180261651A1

公开(公告)日：2018-09-13

申请号：US15697388

申请日：2017-09-06

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Kana HIRAYAMA ,  Kazuhiko YAMAMOTO ,  Yusuke ARAYASHIKI ,  Yosuke MURAKAMI ,  Yusuke KOBAYASHI

IPC: H01L27/24 ,  H01L45/00 ,  G11C13/00

CPC classification number: H01L27/249 ,  G11C13/0007 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2213/32 ,  G11C2213/51 ,  G11C2213/52 ,  G11C2213/71 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/1226 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/146

Abstract: According to one or more embodiments, a memory device includes a first interconnection extending in a first direction, a plurality of second interconnections extending in a second direction intersecting the first direction, and a first resistance change film provided between the first interconnection and the second interconnections. The first resistance change film includes a first conductive layer having a first conductivity, and a second conductive layer provided between the first conductive layer and the plurality of second interconnections and having a second conductivity higher than the first conductivity.

公开(公告)号：US20200243606A1

公开(公告)日：2020-07-30

申请号：US16845538

申请日：2020-04-10

Applicant: Toshiba Memory Corporation

Inventor： Yusuke KOBAYASHI ,  Yoshihisa IWATA ,  Takeshi SUGIMOTO

IPC: H01L27/24 ,  H01L23/528

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.