公开(公告)号：US20010013613A1

公开(公告)日：2001-08-16

申请号：US09781498

申请日：2001-02-12

Applicant: U.S. PHILIPS CORPORATION

Inventor： Godefridus A.M. Hurkx ,  Rob Van Dalen

IPC: H01L029/80 ,  H01L031/112

CPC classification number: H01L29/408 ,  H01L29/861 ,  H01L29/872

Abstract: A semiconductor device has first and second opposed major surfaces (10a and 10b). A semiconductor first region (11) is provided between second (12 or 120) and third (14) regions such that the second region (12 or 120) forms a rectifying junction (13 or 130) with the first region (11) and separates the first region (11) from the first major surface (10a) while the third region (14) separates the first region (11) from the second major surface (10b). A plurality of semi-insulating or resistive paths (21) are dispersed within the first region (1null) such that each path extends through the first region from the second to the third region. In use of the device when a reverse biasing voltage is applied across the rectifying junction (13 or 130) an electrical potential distribution is generated along the resistive paths (21) which causes a depletion region in the first region (11) to extend through the first region (11) to the third region (14) to increase the reverse breakdown voltage of the device. The device may be, for example a pn-n diode in which case the second region is a semiconductive region of the opposite conductivity type to the first region or a Schottky diode in which case the second region (120) forms a Schottky contact with the first region.

Abstract translation: 半导体器件具有第一和第二相对的主表面（10a和10b）。 半导体第一区域（11）设置在第二（12或120）和第三（14）区域之间，使得第二区域（12或120）与第一区域（11）形成整流结（13或130） 所述第一区域（11）从所述第一主表面（10a）移动，而所述第三区域（14）将所述第一区域（11）与所述第二主表面（10b）分离。 多个半绝缘或电阻路径（21）分散在第一区域（1'）内，使得每个路径从第二区域延伸穿过第一区域。 当跨越整流结（13或130）施加反向偏置电压时，在使用该器件时，电阻分布沿着电阻通道（21）产生，这导致第一区域（11）中的耗尽区延伸通过 第一区域（11）到第三区域（14），以增加器件的反向击穿电压。 器件可以是例如pn-n二极管，在这种情况下，第二区域是与第一区域相反的导电类型的半导体区域或肖特基二极管，在这种情况下，第二区域（120）形成肖特基接触 第一区。

公开(公告)号：US20010015433A1

公开(公告)日：2001-08-23

申请号：US09781497

申请日：2001-02-12

Applicant: U.S. PHILIPS CORPORATION

Inventor： Godefridus A.M. Hurkx ,  Rob Van Dalen

IPC: H01L047/00

CPC classification number: H01L29/7802 ,  H01L29/0634 ,  H01L29/402 ,  H01L29/405 ,  H01L29/408

Abstract: A semiconductor body (10) has first and second opposed major surfaces (10a and 10b), with a first region (11) of one conductivity type and a plurality of body regions (32) of the opposite conductivity type each forming a pn junction with the first region (11). A plurality of source regions (33) meet the first major surface (10a) and are each associated with a corresponding body region (32) such that a conduction channel accommodating portion (33a) is defined between each source region (33) and the corresponding body region (32). An insulated gate structure (30,31) adjoins each conduction channel area (33a) for controlling formation of a conduction channel in the conduction channel areas to control majority charge carrier flow from the source regions (33) through the first region (11) to a further region (14) adjoining the second major surface (10b). A plurality of field shaping regions (20) are dispersed within the first region (11) and extend from the source regions (32) towards the further region (14) such that, in use, a voltage is applied between the source and further regions (33 and 14) and the device is non-conducting, the field shaping regions (20) provide a path for charge carriers from the source regions at least partially through the first region and cause a depletion region in the first region (11) to extend through the first region (11) towards the further region (14) to increase the reverse breakdown voltage of the device.

Abstract translation: 半导体本体（10）具有第一和第二相对的主表面（10a和10b），具有一个导电类型的第一区域（11）和相反导电类型的多个体区域（32），每个都形成具有 第一区（11）。 多个源极区域（33）与第一主表面（10a）相遇并且分别与相应的主体区域（32）相关联，使得导电沟道容纳部分（33a）被限定在每个源极区域（33）和相应的 身体区域（32）。 绝缘栅极结构（30,31）邻接每个导电沟道区域（33a），用于控制导电沟道区域中的导电沟道的形成，以控制从源极区域（33）穿过第一区域（11）的多数电荷载流子流到 与第二主表面（10b）相邻的另一区域（14）。 多个场成形区域（20）分散在第一区域（11）内并且从源极区域（32）朝向另外的区域（14）延伸，使得在使用中在源极和其它区域之间施加电压 （33和14），并且器件是非导通的，场成形区域（20）至少部分地通过第一区域提供来自源区的电荷载流子的路径，并且使第一区域（11）中的耗尽区域 延伸穿过第一区域（11）朝向另外的区域（14），以增加装置的反向击穿电压。

公开(公告)号：US20010011723A1

公开(公告)日：2001-08-09

申请号：US09832724

申请日：2001-04-11

Applicant: U.S. PHILIPS CORPORATION

Inventor： Adam R. Brown ,  Godefridus A.M. Hurkx ,  Wiebe B. De Boer ,  Jan W. Slotboom

IPC: H01L029/16 ,  H01L021/20

CPC classification number: H01L29/885 ,  Y10S438/979

Abstract: A semiconductor device with a tunnel diode (23) is particularly suitable for various applications. Such a device comprises two mutually adjoining semiconductor regions (2, 3) of opposed conductivity types and having doping concentrations which are so high that breakdown between them leads to conduction by means of tunnelling. A disadvantage of the known device is that the current-voltage characteristic is not yet steep enough for some applications. In a device according to the invention, the portions (2A, 3A) of the semiconductor regions (2, 3) adjoining the junction (23) comprise a mixed crystal of silicon and germanium. It is surprisingly found that the doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions (2, 3). The tunnelling efficiency is substantially improved as a result of this, and also because of the reduced bandgap of said portions (2A, 3A), and the device according to the invention has a much steeper current-voltage characteristic both in the forward and in the reverse direction. This opens perspectives for inter alia an attractive application where the tunnelling pn junction (23) is used as a transition between two conventional diodes, for example pn or pin diodes, which are used one stacked on the other and which can be formed in a single epitaxial growing process thanks to the invention. The portions (2A, 3A) adjoining the tunnelling junction (22) are preferably 5 to 30 nm thick and comprise between 10 and 50 at % germanium. The doping concentration may be 6null1019 or even more than 1020 at/cm3. The invention further relates to a simple method of manufacturing a device according to the invention. This is preferably done at a temperature of between 550null C. and 800null C.

Abstract translation: 具有隧道二极管（23）的半导体器件特别适用于各种应用。 这种器件包括相对导电类型的两个相互邻接的半导体区域（2,3），并且具有如此之高的掺杂浓度，使得它们之间的击穿导致通过隧道导通。 已知装置的缺点是电流 - 电压特性对于某些应用尚不够陡。 在根据本发明的装置中，与接合部（23）相邻的半导体区域（2,3）的部分（2A，3A）包括硅和锗的混合晶体。 令人惊奇地发现，与形成其余区域（2,3）期间相同量的掺杂剂，磷和硼两者的掺杂浓度显着增加。 因此，由于所述部分（2A，3A）的带隙减小，所以隧道效率显着提高，并且根据本发明的装置在电流 - 电压的正向和反向特性方面具有更陡峭的电流 - 电压特性 相反方向。 这揭示了一个有吸引力的应用，其中隧道pn结（23）用作两个常规二极管（例如pn或pin二极管）之间的过渡的一个有吸引力的应用，它们被一个堆叠在另一个上并且可以形成在单个 外延生长过程由于本发明。 与隧道结（22）相邻的部分（2A，3A）优选为5至30nm厚，并且包含10至50at％的锗。 掺杂浓度可以为6×1019或甚至高于1020 at / cm3。 本发明还涉及一种制造根据本发明的装置的简单方法。 这优选在550℃至800℃的温度下进行。

公开(公告)号：US20020024113A1

公开(公告)日：2002-02-28

申请号：US09854403

申请日：2001-05-11

Applicant: U.S. PHILIPS CORPORATION

Inventor： Godefridus A.M. Hurkx ,  Holger Schligtenhorst ,  Bernd Sievers

IPC: H01L021/331 ,  H01L029/70 ,  H01L031/11

CPC classification number: H01L29/1004 ,  H01L29/7322 ,  Y10S257/927 ,  Y10S257/928

Abstract: The invention relates to a semiconductor device comprising a preferably discrete bipolar transistor with a collector region (1), a base region (2), and an emitter region (3) which are provided with connection conductors (6, 7, 8). A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor (7) of the base region (2) is also put into contact with the collector region (1). In a device according to the invention, the second connection conductor (7) is exclusively connected to the base region (2), and a partial region (2B) of that portion (2A) of the base region (2) which lies outside the emitter region (3), as seen in projection, lying below the second connection conductor (7) is given a smaller flux of dopant atoms. The bipolar transistor in a device according to the invention is provided with a pn clamping diode which is formed between the partial region (2B) and the collector region (1). Such a device has excellent properties, such as a short switching time (ts) and a saturation collector-emitter voltage (VCEsat) which is not too high, while having a low, non-variable and well reproducible leakage current, unlike the known device. The reduced flux of dopant atoms of the partial region (2B) is preferably realized in that the partial region (2B) is given a smaller doping concentration and/or thickness than the remainder (2A) of the portion of the base region (2) which lies outside the emitter region (3). In a favorable modification, a region (4) provided simultaneously with the emitter region (3) is present between the partial region (2B) and the second connection conductor (7).

Abstract translation: 本发明涉及一种半导体器件，其包括具有集电极区域（1），基极区域（2）和设置有连接导体（6,7,8）的发射极区域（3））的优选分立的双极晶体管。 防止晶体管饱和的已知方法是后者具有肖特基钳位二极管。 在这种情况下，后者形成为基部区域（2）的连接导体（7）也与集电区（1）接触。 在根据本发明的装置中，第二连接导体（7）专门连接到基部区域（2），并且基部区域（2）的部分（2A）的局部区域（2B）位于 发射极区域（3），如在投影中所看到的，位于第二连接导体（7）下方的给定较小的掺杂剂原子通量。 根据本发明的器件中的双极晶体管设置有形成在部分区域（2B）和集电极区域（1）之间的pn钳位二极管。 这种器件具有优异的性能，例如开关时间短（ts）和饱和集电极 - 发射极电压（VCEsat），其不是太高，而具有低的，不可变的和良好重现的漏电流，与已知的器件不同 。 优选地，实现部分区域（2B）的掺杂剂原子的减小的通量，其中部分区域（2B）被给予比基极区域（2）的部分的其余部分（2A）更小的掺杂浓度和/或厚度， 其位于发射极区域（3）的外部。 在有利的变型中，与发射极区域（3）同时设置的区域（4）存在于部分区域（2B）和第二连接导体（7）之间。

公开(公告)号：US20010048131A1

公开(公告)日：2001-12-06

申请号：US09781382

申请日：2001-02-12

Applicant: U.S. PHILIPS CORPORATION

Inventor： Godefridus A.M. Hurkx ,  Rob Van Dalen

IPC: H01L029/94

CPC classification number: H01L29/7802 ,  H01L29/0634 ,  H01L29/405 ,  H01L29/408 ,  H01L29/861 ,  H01L29/872

Abstract: A semiconductor body has first and second opposed major surfaces. A first region meets the first major surface and at least one second region meets the second major surface. The semiconductor body provides a voltage-sustaining zone between the first and second regions. The voltage sustaining zone has third regions of one conductivity type interposed with fourth regions of the opposite conductivity type with the second and third regions providing a rectifying junction such that, in use, when the rectifying junction is forward biased in one mode of operation by a voltage applied between the first and second regions, a main current path is provided between the first and second major surfaces through the first region, the voltage-sustaining zone and the second region.

Abstract translation: 半导体本体具有第一和第二相对的主表面。 第一区域与第一主表面相交，并且至少一个第二区域与第二主表面相交。 半导体主体在第一和第二区域之间提供电压维持区域。 电压维持区具有一个导电类型的第三区域，插入具有相反导电类型的第四区域，第二和第三区域提供整流结，使得在使用中，当整流结在一种工作模式下被正向偏置时 施加在第一和第二区域之间的电压，通过第一区域，电压维持区域和第二区域在第一和第二主表面之间提供主电流通路。