公开(公告)号：US20010048131A1

公开(公告)日：2001-12-06

申请号：US09781382

申请日：2001-02-12

Applicant: U.S. PHILIPS CORPORATION

Inventor： Godefridus A.M. Hurkx ,  Rob Van Dalen

IPC: H01L029/94

CPC classification number: H01L29/7802 ,  H01L29/0634 ,  H01L29/405 ,  H01L29/408 ,  H01L29/861 ,  H01L29/872

Abstract: A semiconductor body has first and second opposed major surfaces. A first region meets the first major surface and at least one second region meets the second major surface. The semiconductor body provides a voltage-sustaining zone between the first and second regions. The voltage sustaining zone has third regions of one conductivity type interposed with fourth regions of the opposite conductivity type with the second and third regions providing a rectifying junction such that, in use, when the rectifying junction is forward biased in one mode of operation by a voltage applied between the first and second regions, a main current path is provided between the first and second major surfaces through the first region, the voltage-sustaining zone and the second region.

Abstract translation: 半导体本体具有第一和第二相对的主表面。 第一区域与第一主表面相交，并且至少一个第二区域与第二主表面相交。 半导体主体在第一和第二区域之间提供电压维持区域。 电压维持区具有一个导电类型的第三区域，插入具有相反导电类型的第四区域，第二和第三区域提供整流结，使得在使用中，当整流结在一种工作模式下被正向偏置时 施加在第一和第二区域之间的电压，通过第一区域，电压维持区域和第二区域在第一和第二主表面之间提供主电流通路。

公开(公告)号：US20010015433A1

公开(公告)日：2001-08-23

申请号：US09781497

申请日：2001-02-12

Applicant: U.S. PHILIPS CORPORATION

Inventor： Godefridus A.M. Hurkx ,  Rob Van Dalen

IPC: H01L047/00

CPC classification number: H01L29/7802 ,  H01L29/0634 ,  H01L29/402 ,  H01L29/405 ,  H01L29/408

Abstract: A semiconductor body (10) has first and second opposed major surfaces (10a and 10b), with a first region (11) of one conductivity type and a plurality of body regions (32) of the opposite conductivity type each forming a pn junction with the first region (11). A plurality of source regions (33) meet the first major surface (10a) and are each associated with a corresponding body region (32) such that a conduction channel accommodating portion (33a) is defined between each source region (33) and the corresponding body region (32). An insulated gate structure (30,31) adjoins each conduction channel area (33a) for controlling formation of a conduction channel in the conduction channel areas to control majority charge carrier flow from the source regions (33) through the first region (11) to a further region (14) adjoining the second major surface (10b). A plurality of field shaping regions (20) are dispersed within the first region (11) and extend from the source regions (32) towards the further region (14) such that, in use, a voltage is applied between the source and further regions (33 and 14) and the device is non-conducting, the field shaping regions (20) provide a path for charge carriers from the source regions at least partially through the first region and cause a depletion region in the first region (11) to extend through the first region (11) towards the further region (14) to increase the reverse breakdown voltage of the device.

Abstract translation: 半导体本体（10）具有第一和第二相对的主表面（10a和10b），具有一个导电类型的第一区域（11）和相反导电类型的多个体区域（32），每个都形成具有 第一区（11）。 多个源极区域（33）与第一主表面（10a）相遇并且分别与相应的主体区域（32）相关联，使得导电沟道容纳部分（33a）被限定在每个源极区域（33）和相应的 身体区域（32）。 绝缘栅极结构（30,31）邻接每个导电沟道区域（33a），用于控制导电沟道区域中的导电沟道的形成，以控制从源极区域（33）穿过第一区域（11）的多数电荷载流子流到 与第二主表面（10b）相邻的另一区域（14）。 多个场成形区域（20）分散在第一区域（11）内并且从源极区域（32）朝向另外的区域（14）延伸，使得在使用中在源极和其它区域之间施加电压 （33和14），并且器件是非导通的，场成形区域（20）至少部分地通过第一区域提供来自源区的电荷载流子的路径，并且使第一区域（11）中的耗尽区域 延伸穿过第一区域（11）朝向另外的区域（14），以增加装置的反向击穿电压。

公开(公告)号：US20010050375A1

公开(公告)日：2001-12-13

申请号：US09815619

申请日：2001-03-23

Applicant: U.S. PHILIPS CORPORATION

Inventor： Rob Van Dalen

IPC: H01L029/74 ,  H01L031/111 ,  H01L027/148

CPC classification number: H01L29/404 ,  H01L29/405 ,  H01L29/407 ,  H01L29/7816 ,  H01L29/7817 ,  H01L29/8611

Abstract: A semiconductor body (11) has first and second opposed major surfaces (11a and 11b). First and second main regions (13 and 14) meet the second major surface (11b) and a voltage-sustaining zone is provided between the first and second regions (13 and 14). The voltage-sustaining zone has a semiconductor region (11) of one conductivity type forming a rectifying junction (J) with a region (15) of the device such that, when the rectifying junction is reverse-biased in one mode of operation, a depletion region extends in the semiconductor region of the voltage-sustaining zone. A number of conductive regions (22) are isolated from and extend through the semiconductor region (11) in a direction transverse to the first and second major surfaces (11a and 11b) so as to be spaced apart in a direction between first and second main regions. A voltage regulator (20; 20null; 20a and 20b) is provided for setting the voltage at each conductive regions (22) so as to control the voltage distribution, and thus the electrical field profile, in the voltage- sustaining zone when the rectifying junction is reverse-biased in said one mode of operation.

Abstract translation: 半导体本体（11）具有第一和第二相对的主表面（11a和11b）。 第一和第二主要区域（13和14）与第二主表面（11b）相遇，并且在第一和第二区域（13和14）之间设置有电压维持区域。 电压维持区具有形成整流结（J）的一种导电类型的半导体区域（11）和该器件的区域（15），使得当在一种工作模式下整流结被反向偏置时 耗尽区域在电压维持区域的半导体区域中延伸。 多个导电区域（22）在横向于第一和第二主表面（11a和11b）的方向上与半导体区域（11）隔离并延伸穿过半导体区域（11），以便在第一和第二主表面 地区。 提供电压调节器（20; 20'; 20a和20b），用于设置每个导电区域（22）处的电压，以便控制在整流过程中的电压维持区域中的电压分布，从而控制电场分布 在所述一种操作模式中，结点被反向偏置。

公开(公告)号：US20010020720A1

公开(公告)日：2001-09-13

申请号：US09803325

申请日：2001-03-09

Applicant: U.S. Philips Corporation

Inventor： Raymond J.E. Hueting ,  Erwin A. Hijzen ,  Rob Van Dalen

IPC: H01L029/76 ,  H01L029/94 ,  H01L031/062 ,  H01L031/113 ,  H01L031/119

CPC classification number: H01L29/7813 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7827 ,  H01L29/8122

Abstract: A field-effect semiconductor device, for example a MOSFET of the trench-gate type, comprises side-by-side device cells at a surface (10a) of a semiconductor body (10), and at least one drain connection (41) that extends in a drain trench (40) from the body surface (10a) to an underlying drain region (14a). A channel-accommodating region (15) of the device extends laterally to the drain trench (40). The drain trench (40) extends through the thickness of the channel-accommodating region (15) to the underlying drain region (14a), and the drain connection (41) is separated from the channel-accommodating region (15) by an intermediate insulating layer (24) on side-walls of the drain trench (40). A compact cellular layout can be achieved, with a significant proportion of the total cellular layout area accommodating conduction channels (12). The configuration in a discrete device avoids a need to use a substrate conduction path and so advantageously reduces the ON resistance of the device.

Abstract translation: 场效应半导体器件（例如沟槽栅型MOSFET）包括在半导体本体（10）的表面（10a）处的并排器件单元，以及至少一个漏极连接（41），其中， 在漏极沟槽（40）中从主体表面（10a）延伸到下面的漏极区域（14a）。 器件的通道容纳区域（15）横向延伸到漏极沟槽（40）。 漏极沟槽（40）通过沟道容纳区域（15）的厚度延伸到下面的漏极区域（14a），并且漏极连接部分（41）通过中间绝缘体与沟道容纳区域（15）分离 层（24）在排水沟槽（40）的侧壁上。 可以实现紧凑的蜂窝布局，其中大部分的总细胞布局区域容纳传导通道（12）。 分立器件中的配置避免了使用衬底传导路径的需要，因此有利地降低了器件的导通电阻。

公开(公告)号：US20010013613A1

公开(公告)日：2001-08-16

申请号：US09781498

申请日：2001-02-12

Applicant: U.S. PHILIPS CORPORATION

Inventor： Godefridus A.M. Hurkx ,  Rob Van Dalen

IPC: H01L029/80 ,  H01L031/112

CPC classification number: H01L29/408 ,  H01L29/861 ,  H01L29/872

Abstract: A semiconductor device has first and second opposed major surfaces (10a and 10b). A semiconductor first region (11) is provided between second (12 or 120) and third (14) regions such that the second region (12 or 120) forms a rectifying junction (13 or 130) with the first region (11) and separates the first region (11) from the first major surface (10a) while the third region (14) separates the first region (11) from the second major surface (10b). A plurality of semi-insulating or resistive paths (21) are dispersed within the first region (1null) such that each path extends through the first region from the second to the third region. In use of the device when a reverse biasing voltage is applied across the rectifying junction (13 or 130) an electrical potential distribution is generated along the resistive paths (21) which causes a depletion region in the first region (11) to extend through the first region (11) to the third region (14) to increase the reverse breakdown voltage of the device. The device may be, for example a pn-n diode in which case the second region is a semiconductive region of the opposite conductivity type to the first region or a Schottky diode in which case the second region (120) forms a Schottky contact with the first region.

Abstract translation: 半导体器件具有第一和第二相对的主表面（10a和10b）。 半导体第一区域（11）设置在第二（12或120）和第三（14）区域之间，使得第二区域（12或120）与第一区域（11）形成整流结（13或130） 所述第一区域（11）从所述第一主表面（10a）移动，而所述第三区域（14）将所述第一区域（11）与所述第二主表面（10b）分离。 多个半绝缘或电阻路径（21）分散在第一区域（1'）内，使得每个路径从第二区域延伸穿过第一区域。 当跨越整流结（13或130）施加反向偏置电压时，在使用该器件时，电阻分布沿着电阻通道（21）产生，这导致第一区域（11）中的耗尽区延伸通过 第一区域（11）到第三区域（14），以增加器件的反向击穿电压。 器件可以是例如pn-n二极管，在这种情况下，第二区域是与第一区域相反的导电类型的半导体区域或肖特基二极管，在这种情况下，第二区域（120）形成肖特基接触 第一区。