公开(公告)号：US20180332700A1

公开(公告)日：2018-11-15

申请号：US15590020

申请日：2017-05-09

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min TAIN ,  Kai-Ming YANG ,  Chien-Tsai LI

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0209 ,  H05K1/114 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/041

Abstract: A circuit board includes a first dielectric layer, a first circuit layer, a second circuit layer, a plurality of conductive vias, a second dielectric layer, a patterned seed layer, and a plurality of bonding layers. The first circuit layer is disposed in the first dielectric layer. The second circuit layer is disposed on the first dielectric layer. The conductive vias are disposed in the first dielectric layer and connect the first circuit layer to the second circuit layer. The second dielectric layer is disposed on the first dielectric layer and the second circuit layer and has a plurality of openings to expose a plurality of parts of the second circuit layer. The patterned seed layer is disposed on the exposed parts of second circuit layer and sidewalls of the openings. The bonding layers are respectively disposed on the patterned seed layer and made of porous copper.

公开(公告)号：US20190139907A1

公开(公告)日：2019-05-09

申请号：US16240806

申请日：2019-01-07

Applicant: Unimicron Technology Corp.

Inventor： Pu-Ju LIN ,  Cheng-Ta KO ,  Yu-Hua CHEN ,  Tzyy-Jang TSENG ,  Ra-Min TAIN

IPC: H01L23/00 ,  H01L23/66

Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.

公开(公告)号：US20190096845A1

公开(公告)日：2019-03-28

申请号：US16203635

申请日：2018-11-29

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng WANG ,  Ra-Min TAIN

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L24/73 ,  H01L23/49822 ,  H01L23/49866 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13647 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/29147 ,  H01L2224/32227 ,  H01L2224/73104 ,  H01L2224/81204 ,  H01L2224/81447 ,  H01L2924/351 ,  H01L2924/00014

Abstract: A chip module includes a body, a bump, and a first bonding layer. The bump is disposed on the body. The first bonding layer is disposed on the bump. The first bonding layers and the bump are made of the same conductive material and the first bonding layer is porous.

公开(公告)号：US20210159191A1

公开(公告)日：2021-05-27

申请号：US17170736

申请日：2021-02-08

Applicant: Unimicron Technology Corp.

Inventor： Pu-Ju LIN ,  Cheng-Ta KO ,  Yu-Hua CHEN ,  Tzyy-Jang TSENG ,  Ra-Min TAIN

IPC: H01L23/00 ,  H01L23/66 ,  H01L23/16

Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.

公开(公告)号：US20200266155A1

公开(公告)日：2020-08-20

申请号：US16866530

申请日：2020-05-04

Applicant: Unimicron Technology Corp.

Inventor： Pu-Ju LIN ,  Cheng-Ta KO ,  Yu-Hua CHEN ,  Tzyy-Jang TSENG ,  Ra-Min TAIN

IPC: H01L23/00 ,  H01L23/16 ,  H01L23/66

Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.

公开(公告)号：US20250105536A1

公开(公告)日：2025-03-27

申请号：US18605597

申请日：2024-03-14

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Ra-Min TAIN ,  Chunhsien CHIEN ,  Ching-Ho HSIEH ,  Ming-Hsing WU

IPC: H01R12/71

Abstract: A connector and a manufacturing method thereof. The connector includes at least one circuit substrate, at least one contact and a first elastic body. The at least one circuit substrate has a first surface. The at least one contact includes a fixed part and a first contact part that are connected to each other. The fixed part is disposed on the at least one circuit substrate. The first contact part protrudes out of the first surface and covers a part of the first surface. The first elastic body is disposed on the first surface and is electrically insulated. At least a part of the first elastic body is located between the first contact part and the first surface.

公开(公告)号：US20230420818A1

公开(公告)日：2023-12-28

申请号：US18121476

申请日：2023-03-14

Applicant: UNIMICRON TECHNOLOGY CORP ,  TUNGHAI UNIVERSITY

Inventor： Chi-Feng CHEN ,  Po-Sheng YEN ,  Ruey-Beei WU ,  Ra-Min TAIN ,  Chin-Sheng WANG ,  Jun-Ho CHEN

IPC: H01P1/203

CPC classification number: H01P1/20309

Abstract: A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.

公开(公告)号：US20190098746A1

公开(公告)日：2019-03-28

申请号：US16203636

申请日：2018-11-29

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min TAIN ,  Kai-Ming YANG ,  Chien-Tsai LI

IPC: H05K1/02 ,  H05K1/11

Abstract: A method for forming a circuit board includes forming a first dielectric layer, a first circuit layer in the first dielectric layer, a second circuit layer on the first dielectric layer, and a plurality of conductive vias in the first dielectric layer and connecting the first circuit layer to the second circuit layer; forming a second dielectric layer on the first dielectric layer and the second circuit layer; forming a plurality of openings in the second dielectric layer to expose a plurality of parts of the second circuit layer; forming a seed layer on the exposed parts of the second circuit layer and sidewalls of the openings; and forming a plurality of bonding layers on the seed layer, wherein the bonding layers and the seed layer are made of copper, and the bonding layers are porous.