公开(公告)号：US09224696B2

公开(公告)日：2015-12-29

申请号：US14095980

申请日：2013-12-03

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Shih-Wei Li ,  Yun-Han Chu ,  Guo-Chih Wei

IPC: H01L23/00 ,  H01L23/14 ,  H01L21/02

CPC classification number: H01L23/562 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/0226 ,  H01L21/31116 ,  H01L21/481 ,  H01L21/76256 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L2224/83 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated semiconductor device and method for fabricating the same are provided wherein the integrated semiconductor device comprises a substrate a first stress-inducing layer, a second stress-inducing layer and an integrated circuit layer. The first stress-inducing layer covers on the substrate. The second stress-inducing layer partially covers on the first stress-inducing layer. The integrated circuit layer is bonded over the substrate.

Abstract translation: 提供了一种集成半导体器件及其制造方法，其中集成半导体器件包括第一应力感应层，第二应力感应层和集成电路层。 第一应力诱导层覆盖在基底上。 第二应力诱导层部分地覆盖在第一应力诱导层上。 集成电路层结合在衬底上。

公开(公告)号：US09287222B1

公开(公告)日：2016-03-15

申请号：US14937875

申请日：2015-11-11

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Shih-Wei Li ,  Yun-Han Chu ,  Guo-Chih Wei

IPC: H01L21/00 ,  H01L23/00 ,  H01L21/762 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L23/562 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/0226 ,  H01L21/31116 ,  H01L21/481 ,  H01L21/76256 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L2224/83 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated semiconductor device and method for fabricating the same are provided wherein the integrated semiconductor device comprises a substrate a first stress-inducing layer, a second stress-inducing layer and an integrated circuit layer. The first stress-inducing layer covers on the substrate. The second stress-inducing layer partially covers on the first stress-inducing layer. The integrated circuit layer is bonded over the substrate.

公开(公告)号：US20150155242A1

公开(公告)日：2015-06-04

申请号：US14095980

申请日：2013-12-03

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Shih-Wei Li ,  Yun-Han Chu ,  Guo-Chih Wei

IPC: H01L23/00 ,  H01L21/02 ,  H01L23/14

CPC classification number: H01L23/562 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/0226 ,  H01L21/31116 ,  H01L21/481 ,  H01L21/76256 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L2224/83 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated semiconductor device and method for fabricating the same are provided wherein the integrated semiconductor device comprises a substrate a first stress-inducing layer, a second stress-inducing layer and an integrated circuit layer. The first stress-inducing layer covers on the substrate. The second stress-inducing layer partially covers on the first stress-inducing layer. The integrated circuit layer is bonded over the substrate.

Abstract translation: 提供了一种集成半导体器件及其制造方法，其中集成半导体器件包括第一应力感应层，第二应力感应层和集成电路层。 第一应力诱导层覆盖在基底上。 第二应力诱导层部分地覆盖在第一应力诱导层上。 集成电路层结合在衬底上。