摘要:
A method and apparatus to receive a plurality of packet from an inflow of a single packet flow. In response to receiving the plurality of packets, a plurality of packet pointers is enqueued into multiple physical queues. Each of the plurality of packet pointers designates one of the plurality of packets from the single packet flow. The plurality of packet pointers are dequeued from the multiple physical queues to transmit the plurality of packets along an outflow of the single packet flow.
摘要:
According to some embodiments, systems an apparatuses may have a communication path to exchange information packets. A processor may process information packets. A buffer pool cache local to the processor may store free buffer handles for information packets when the buffer pool cache local to the processor is not full. A non-local memory may store the free buffer handles for information packets when the buffer pool cache local to the processor is full.
摘要:
Techniques for optimizing queuing performance include passing, from a ring having M slots, one or more enqueue requests and one or more dequeue requests to a queue manager, and determining whether the ring is full, and if the ring is full, sending only an enqueue request to the queue manager when one of the M slots is next available, otherwise, sending both an enqueue request and a dequeue request to the queue manager.
摘要:
A method according to one embodiment may include storing data in a send buffer. A transmission header may be created, in which the transmission header may include a pointer to the data in the send buffer. Packets may be transmitted, in which the packets include the transmission header and the data linked to the transmission header by the pointer, wherein the packets are transmitted without copying the data to create the packets. Of course, many alternatives, variations and modifications are possible without materially departing from this embodiment.
摘要:
A method according to one embodiment may include storing data in a send buffer. A transmission header may be created, in which the transmission header may include a pointer to the data in the send buffer. Packets may be transmitted, in which the packets include the transmission header and the data linked to the transmission header by the pointer, wherein the packets are transmitted without copying the data to create the packets. Of course, many alternatives, variations and modifications are possible without materially departing from this embodiment.
摘要:
Techniques for parallel processing of events within multiple event contexts include dynamically binding an event context to an execution context in response to receiving an event by storing arriving events into a global event queue and storing events from the global event queue in per-execution context event queues are described. The techniques associate event queues with the execution contexts to temporarily store the events for a duration of the binding and thus dynamically bind the events received on a per-event basis in the context queues.
摘要:
A device, method, and system are disclosed. In one embodiment the device includes a router to transmit data packets between multiple host controllers and one or more peripheral devices. The router can receive a data packet from a host controller and transmit the data packet to a peripheral device across a data transmission path. The peripheral device is coupled to the first data transmission path through a first universal multi-transport medium (UMTM) connector. The connector includes an optical coupling capable of transporting the first data packet within an optical signal and an electrical coupling capable of transporting the first data packet within an electrical signal.
摘要:
In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction cache to cache a subset of the at least the portion of the at least one program from the instruction store, with different respective portions of the engine's instruction cache being allocated to different respective ones of the engine threads.
摘要:
In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction cache to cache a subset of the at least the portion of the at least one program from the instruction store, with different respective portions of the engine's instruction cache being allocated to different respective ones of the engine threads.
摘要:
Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include determining a first local time at a first port of a first switch of a switching fabric of a multi-protocol interconnect and a second local time at a second port of a second switch of the switching fabric, calculating an offset value based at least in part on a difference between the first local time and the second local time, and adjusting the second local time by the offset value. Other embodiments may be described and claimed.