公开(公告)号：US20210082839A1

公开(公告)日：2021-03-18

申请号：US17103584

申请日：2020-11-24

Applicant: United Microelectronics Corp.

Inventor： Shih-Che Huang ,  Shih-Hsien Chen ,  Ching-Li Yang ,  Chih-Sheng Chang

IPC: H01L23/58 ,  H01L23/10 ,  H01L23/522 ,  H01L21/48 ,  H01L23/00 ,  H01L21/768

Abstract: A method of manufacturing a die seal ring including the following steps is provided. A dielectric layer is formed on a substrate. Conductive layers stacked on the substrate are formed in the dielectric layer. Each of the conductive layers includes a first conductive portion and a second conductive portion. The second conductive portion is disposed on the first conductive portion. A width of the first conductive portion is smaller than a width of the second conductive portion. A first air gap is formed between a sidewall of the first conductive portion and the dielectric layer. A second air gap is formed between a sidewall of the second conductive portion and the dielectric layer.

公开(公告)号：US11664333B2

公开(公告)日：2023-05-30

申请号：US17103584

申请日：2020-11-24

Applicant: United Microelectronics Corp.

Inventor： Shih-Che Huang ,  Shih-Hsien Chen ,  Ching-Li Yang ,  Chih-Sheng Chang

IPC: H01L21/48 ,  H01L21/768 ,  H01L23/58 ,  H01L23/10 ,  H01L23/522 ,  H01L23/00

CPC classification number: H01L23/585 ,  H01L21/4846 ,  H01L21/7682 ,  H01L23/10 ,  H01L23/522 ,  H01L23/562 ,  H01L21/76807

Abstract: A method of manufacturing a die seal ring including the following steps is provided. A dielectric layer is formed on a substrate. Conductive layers stacked on the substrate are formed in the dielectric layer. Each of the conductive layers includes a first conductive portion and a second conductive portion. The second conductive portion is disposed on the first conductive portion. A width of the first conductive portion is smaller than a width of the second conductive portion. A first air gap is formed between a sidewall of the first conductive portion and the dielectric layer. A second air gap is formed between a sidewall of the second conductive portion and the dielectric layer.

公开(公告)号：US10892235B2

公开(公告)日：2021-01-12

申请号：US16135997

申请日：2018-09-19

Applicant: United Microelectronics Corp.

Inventor： Shih-Che Huang ,  Shih-Hsien Chen ,  Ching-Li Yang ,  Chih-Sheng Chang

IPC: H01L21/764 ,  H01L21/768 ,  H01L23/58 ,  H01L23/10 ,  H01L23/522 ,  H01L21/48 ,  H01L23/00

Abstract: A die seal ring and a manufacturing method thereof are provided. The die seal ring includes a substrate, a dielectric layer, and conductive layers. The dielectric layer is disposed on the substrate. The conductive layers are stacked on the substrate and located in the dielectric layer. Each of the conductive layers includes a first conductive portion and a second conductive portion. The second conductive portion is disposed on the first conductive portion. A width of the first conductive portion is smaller than a width of the second conductive portion. A first air gap is disposed between a sidewall of the first conductive portion and the dielectric layer. A second air gap is disposed between a sidewall of the second conductive portion and the dielectric layer. The die seal ring and the manufacturing method thereof can effectively prevent cracks generated during the die sawing process from damaging the circuit structure.

公开(公告)号：US20200066657A1

公开(公告)日：2020-02-27

申请号：US16135997

申请日：2018-09-19

Applicant: United Microelectronics Corp.

Inventor： Shih-Che Huang ,  Shih-Hsien Chen ,  Ching-Li Yang ,  Chih-Sheng Chang

IPC: H01L23/58 ,  H01L23/10 ,  H01L23/00 ,  H01L21/48 ,  H01L23/522

Abstract: A die seal ring and a manufacturing method thereof are provided. The die seal ring includes a substrate, a dielectric layer, and conductive layers. The dielectric layer is disposed on the substrate. The conductive layers are stacked on the substrate and located in the dielectric layer. Each of the conductive layers includes a first conductive portion and a second conductive portion. The second conductive portion is disposed on the first conductive portion. A width of the first conductive portion is smaller than a width of the second conductive portion. A first air gap is disposed between a sidewall of the first conductive portion and the dielectric layer. A second air gap is disposed between a sidewall of the second conductive portion and the dielectric layer. The die seal ring and the manufacturing method thereof can effectively prevent cracks generated during the die sawing process from damaging the circuit structure.

公开(公告)号：US10438893B2

公开(公告)日：2019-10-08

申请号：US15784180

申请日：2017-10-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Hsien Chen ,  Meng-Jun Wang ,  Ting-Chun Wang ,  Chih-Sheng Chang

IPC: H01L23/532 ,  H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L23/528 ,  H01L23/522

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first inter-metal dielectric (IMD) layer thereon; forming a first metal interconnection and a second metal interconnection in the first IMD layer; removing part of the first IMD layer to form a recess between the first metal interconnection and the second metal interconnection; performing a curing process; and forming a second IMD layer on the first metal interconnection and the second metal interconnection.

公开(公告)号：US20190096819A1

公开(公告)日：2019-03-28

申请号：US15784180

申请日：2017-10-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Hsien Chen ,  Meng-Jun Wang ,  Ting-Chun Wang ,  Chih-Sheng Chang

IPC: H01L23/532 ,  H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L23/528

CPC classification number: H01L23/53295 ,  H01L21/02115 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/7682 ,  H01L21/76828 ,  H01L21/76832 ,  H01L21/7685 ,  H01L21/76895 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53228

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first inter-metal dielectric (IMD) layer thereon; forming a first metal interconnection and a second metal interconnection in the first IMD layer; removing part of the first IMD layer to form a recess between the first metal interconnection and the second metal interconnection; performing a curing process; and forming a second IMD layer on the first metal interconnection and the second metal interconnection.