公开(公告)号：US20160179177A1

公开(公告)日：2016-06-23

申请号：US14970354

申请日：2015-12-15

Applicant: VIA TECHNOLOGIES, INC.

Inventor： G. GLENN HENRY ,  DARIUS D. GASKINS

IPC: G06F1/32 ,  G06F9/30

CPC classification number: G06F1/26 ,  G06F1/24 ,  G06F1/3243 ,  G06F1/3287 ,  G06F9/30076 ,  G06F9/30083 ,  G06F9/44505 ,  G06F9/5094 ,  G06F11/1423 ,  G06F11/3664 ,  G06F13/36 ,  G06F15/163 ,  G06F15/82 ,  Y02D10/14 ,  Y02D10/22

Abstract: A method is provided for managing power consumption within a multi-core microprocessor. An operating system issues an operating system instruction to transition a recipient core to a targeted power and/or performance state that is one of many possible states into which a microprocessor can place a core. Each core of the microprocessor has its own target state, and different cores may have different target states. After receiving the instruction, the recipient core implements any settings associated with its target core state that wouldn't affect resources shared with other cores. The recipient core also initiates an inter-core discovery process to determine a target multi-core state of all the cores sharing the resource. The target multi-core state reflects one or more settings that match the settings of the recipient core's target core state as much as possible without lowering a performance of any resource-sharing core below that core's own target core state.

Abstract translation: 提供了一种用于管理多核微处理器内的功耗的方法。 操作系统发出操作系统指令，以将接收者核心转换为微处理器可放置核心的许多可能状态之一的目标功率和/或性能状态。 微处理器的每个核心都有自己的目标状态，不同的核心可能有不同的目标状态。 收到该指令后，收件人核心将实现与其目标核心状态相关联的任何设置，这些设置不会影响与其他核心共享的资源。 接收者核心还发起核心间发现过程，以确定共享资源的所有核心的目标多核状态。 目标多核状态反映了一个或多个设置，尽可能多地匹配接收者核心的目标核心状态的设置，而不会降低任何资源共享内核在该核心自己的目标核心状态之下的性能。

公开(公告)号：US20160209897A1

公开(公告)日：2016-07-21

申请号：US14980209

申请日：2015-12-28

Applicant: VIA TECHNOLOGIES, INC.

Inventor： G. GLENN HENRY ,  DARIUS D. GASKINS

IPC: G06F1/26

CPC classification number: G06F1/26 ,  G06F1/24 ,  G06F1/3243 ,  G06F1/3287 ,  G06F9/30076 ,  G06F9/30083 ,  G06F9/44505 ,  G06F9/5094 ,  G06F11/1423 ,  G06F11/3664 ,  G06F13/36 ,  G06F15/163 ,  G06F15/82 ,  Y02D10/14 ,  Y02D10/22

Abstract: A multi-die package for a microprocessor provides a power management synchronization system. The package has a plurality of dies. Each die has a plurality of cores, including a single master core. A plurality of sideband non-system-bus inter-die communication wires communicatively couple the dies to each other for a purpose of synchronizing power management. The master core of each die is configured to use one and only one of the inter-die communication wires to transmit power management synchronization messages to each of the other master cores. The master core of each die is also configured to receive power management synchronization messages from each of the other master cores via one or more inter-die communication wires. The cores use this system of inter-die communication wires to synchronize management of resources that affect both the performance and power consumption of the cores.

Abstract translation: 用于微处理器的多管芯封装提供电源管理同步系统。 该封装具有多个管芯。 每个管芯具有多个芯，包括单个母芯。 为了同步电源管理的目的，多个边带非系统总线芯片间通信线通信地将管芯彼此连接。 每个管芯的主核心被配置为使用芯片间通信线中的一个且仅一个将功率管理同步消息发送到每个其他主核。 每个裸片的主核心还被配置为经由一个或多个芯片间通信线路从每个其他主核心接收功率管理同步消息。 内核使用这种芯片间通信线系统来同步影响内核性能和功耗的资源管理。