公开(公告)号：US09224862B2

公开(公告)日：2015-12-29

申请号：US14468503

申请日：2014-08-26

申请人： Vanguard International Semiconductor Corporation

发明人： Wei-Chun Chou ,  Yi-Hung Chiu ,  Chu-Feng Chen ,  Cheng-Yi Hsieh ,  Chung-Ren Lao

IPC分类号： H01L29/76 ,  H01L29/78 ,  H01L29/10 ,  H01L29/66 ,  H01L29/08 ,  H01L29/423

CPC分类号： H01L29/7835 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7816

摘要： A high voltage semiconductor device is provided. The device includes a semiconductor substrate having a high voltage well with a first conductivity type therein. A gate structure is disposed on the semiconductor substrate of the high voltage well. A source doped region and a drain doped region are in the high voltage well on both sides of the gate structure, respectively. A lightly doped region with the first conductivity type is between the source and drain doped regions and relatively near to the source doped region. The disclosure also presents a method for fabricating a high voltage semiconductor device.

摘要翻译： 提供高压半导体器件。 该器件包括其中具有第一导电类型的具有高电压阱的半导体衬底。 栅极结构设置在高电压阱的半导体衬底上。 源极掺杂区域和漏极掺杂区域分别位于栅极结构两侧的高压阱中。 具有第一导电类型的轻掺杂区域在源极和漏极掺杂区域之间并且相对接近源极掺杂区域。 本公开还提出了制造高电压半导体器件的方法。

公开(公告)号：US09831305B1

公开(公告)日：2017-11-28

申请号：US15148090

申请日：2016-05-06

申请人： Vanguard International Semiconductor Corporation

发明人： Chu-Feng Chen ,  Wei-Chun Chou ,  Chien-Wei Chiu

IPC分类号： H01L23/535 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/063 ,  H01L23/535 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/1087 ,  H01L29/42368 ,  H01L29/7391

摘要： A semiconductor device is provided. The semiconductor device includes a substrate; an epitaxial layer; a first conductive type first well region disposed in the substrate and the epitaxial layer; a second conductive type first buried layer and a second conductive type second buried layer disposed at opposite sides of the first conductive type first well region, respectively; a first conductive type second well region disposed in the epitaxial layer and being in direct contact with the first conductive type first well region; a second conductive type third buried layer disposed in the first conductive type first well region and/or the first conductive type second well region; a second conductive type doped region disposed in the first conductive type second well region; a gate structure; a drain contact plug; and a source contact plug.

公开(公告)号：US09343572B1

公开(公告)日：2016-05-17

申请号：US14603997

申请日：2015-01-23

申请人： Vanguard International Semiconductor Corporation

发明人： Chung-Ren Lao ,  Hsing-Chao Liu ,  Chu-Feng Chen ,  Wei-Chun Chou

IPC分类号： H01L29/78 ,  H01L29/40 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC分类号： H01L29/7835 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7816

摘要： A high-voltage semiconductor device is provided. The high-voltage semiconductor device includes a substrate; an epitaxial layer and a gate structure; a first conductive type first high-voltage well region and a second conductive type high-voltage well region disposed in the epitaxial layer at opposite sides of the gate structure respectively, wherein the first conductive type is different from the second conductive type; a source region and a drain region; and a stack structure disposed between the gate structure and the drain region, wherein the stack structure includes: a blocking layer; an insulating layer disposed over the blocking layer; and a conductive layer disposed over the insulating layer and electrically connected the source region or the gate structure. A method for manufacturing the high-voltage semiconductor device is also provided.

摘要翻译： 提供高压半导体器件。 高压半导体装置包括：基板; 外延层和栅极结构; 第一导电型第一高压阱区和第二导电型高压阱区，分别设置在栅极结构的相对侧的外延层中，其中第一导电类型不同于第二导电类型; 源区和漏区; 以及设置在所述栅极结构和所述漏极区之间的堆叠结构，其中所述堆叠结构包括：阻挡层; 设置在阻挡层上的绝缘层; 以及设置在所述绝缘层上并且电连接所述源极区域或所述栅极结构的导电层。 还提供了制造高电压半导体器件的方法。