Apparatus and method for skew measurement
    1.
    发明授权
    Apparatus and method for skew measurement 有权
    用于偏斜测量的装置和方法

    公开(公告)号:US07454647B1

    公开(公告)日:2008-11-18

    申请号:US11192426

    申请日:2005-07-28

    IPC分类号: G06F1/00 G01R13/00

    CPC分类号: G01R31/31726 G01R31/31937

    摘要: A skew measurement system and method wherein each of the signals among which the skew is to be determined is connected one at a time to a clock recovery loop. The locked state of the clock recovery loop is used as an indicator of the skew of the data signal relative to the internal clock of the clock recovery loop. By measuring the difference between the locked state of different signals, their relative skew can be measured.

    摘要翻译: 歪斜测量系统和方法,其中要确定歪斜的每个信号一次一个地连接到时钟恢复环路。 时钟恢复环路的锁定状态用作数据信号相对于时钟恢复环路内部时钟的偏斜的指示。 通过测量不同信号的锁定状态之间的差异,可以测量它们的相对偏差。

    Differential signal generator with built-in test circuitry
    3.
    发明授权
    Differential signal generator with built-in test circuitry 有权
    差分信号发生器,内置测试电路

    公开(公告)号:US07208981B1

    公开(公告)日:2007-04-24

    申请号:US10907904

    申请日:2005-04-20

    IPC分类号: H03K5/22

    摘要: A circuit and method are provided for performing built-in test of output signal magnitudes of integrated differential signal generator circuitry. In accordance with one embodiment, first upper and lower reference voltages and second upper and lower reference voltages are received via a plurality of reference electrodes, wherein: a difference between the first and upper and lower reference voltages comprises a first difference magnitude; a difference between the second upper and lower reference voltages comprises a second difference magnitude; and the first difference magnitude is greater than the second difference magnitude. Test signal generator circuitry provides a plurality of binary signals with respective successions of opposing signal states. Differential signal generator circuitry, coupled to the test signal generator circuitry and responsive to the plurality of binary signals, provides a plurality of differential signals having respective magnitudes related to the respective successions of opposing binary signal states. Signal comparison circuitry, coupled to the plurality of reference electrodes and the differential signal generator circuitry, and responsive to the first and second upper and lower reference signals and the plurality of differential signals, provides a plurality of test signals with respective test signal states indicative of whether respective ones of the differential signal magnitudes are within a range defined as being less than the first difference magnitude and greater than the second difference magnitude.

    摘要翻译: 提供了一种电路和方法,用于对集成差分信号发生器电路的输出信号幅值进行内置测试。 根据一个实施例,经由多个参考电极接收第一上参考电压和第二上参考电压和第二上基准电压和下参考电压,其中:第一和上参考电压之间的差包括第一差幅度; 第二上参考电压和下参考电压之间的差包括第二差值; 并且第一差值幅度大于第二差值幅度。 测试信号发生器电路提供具有各自相对的信号状态的多个二进制信号。 耦合到测试信号发生器电路并响应于多个二进制信号的差分信号发生器电路提供具有与相应二进制信号状态的相应序列相关的相应幅度的多个差分信号。 耦合到多个参考电极和差分信号发生器电路并且响应于第一和第二上参考信号和下参考信号和多个差分信号的信号比较电路提供多个测试信号,其中各测试信号状态指示 差分信号幅度中的各个是否在限定为小于第一差分幅度并大于第二差值的范围内。

    Receiver system having analog pre-filter and digital equalizer
    4.
    发明授权
    Receiver system having analog pre-filter and digital equalizer 有权
    接收机系统具有模拟预滤波器和数字均衡器

    公开(公告)号:US07664172B1

    公开(公告)日:2010-02-16

    申请号:US11505137

    申请日:2006-08-15

    IPC分类号: H03H7/30 H04B1/10 H04L1/00

    CPC分类号: H04L25/03057 H04L25/03254

    摘要: A receiver system contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605) arranged sequentially for processing an input analog signal (yk). The pre-filter produces a filtered analog signal (Zs) with reduced intersymbol interference. The converter provides analog-to-digital signal conversion. Digital equalization circuitry in the equalizer operates according to a transfer frmnction c - 1 ⁢ z + c 0 + ∑ M i = 1 ⁢ c i ⁢ z - i to produce an equalized digital signal (a'k) as a stream of equalized digital values. Coefficients c−1 and c0 are fixed. Each other coefficient ci is adaptively chosen. The decoder converts the equalized digital values, or intermediate values generated therefrom, into a stream of symbols. A receiver system may include two or more receivers each configured in the foregoing way with the digital equalization circuitry in each receiver operating according to a transfer function ∑ i = - N M ⁢ c i ⁢ z - i where at least coefficients c−1, c0, and c1 are non-zero.

    摘要翻译: 一个接收机系统包括一个模拟预滤波器(207或619),一个模数转换器(210),一个数字均衡器(212)和一个解码器(605),它们依次排列,用于处理输入的模拟信号(yk) 。 预滤波器产生具有减少的符号间干扰的滤波模拟信号(Zs)。 该转换器提供模数转换。 均衡器中的数字均衡电路根据传输速率c-1 z + c 0 +ΣM i = 1 ci z-i进行操作,以产生均衡数字信号(a'k)作为均衡数字值流 。 系数c-1和c0是固定的。 自适应地选择其他系数ci。 解码器将均衡的数字值或由其生成的中间值转换成符号流。 接收机系统可以包括两个或更多个接收机,每个接收机以前述方式配置,其中每个接收机中的数字均衡电路根据传递函数Σi = - NM ci z-i进行操作,其中至少系数c-1,c0, 而c1不为零。

    Receiver system with interdependent adaptive analog and digital signal equalization
    5.
    发明授权
    Receiver system with interdependent adaptive analog and digital signal equalization 有权
    具有相互依赖的自适应模拟和数字信号均衡的接收机系统

    公开(公告)号:US07646807B1

    公开(公告)日:2010-01-12

    申请号:US11490437

    申请日:2006-07-19

    IPC分类号: H04B1/10 H04L1/00

    CPC分类号: H04L25/03057 H04L25/03254

    摘要: An analog equalizer (613 and 614) adaptively equalizes an input analog signal affected with intersymbol interference (“ISI”), or an intermediate analog signal generated therefrom, to produce a filtered partially equalized analog signal with reduced ISI. An analog-to-digital converter (210) converts the filtered analog signal, or an intermediate analog signal generated therefrom, into an initial digital signal. A digital equalizer (212) adaptively equalizes the initial digital signal, or an intermediate digital signal generated therefrom, to produce an equalized digital signal as a stream of equalized digital values with further reduced ISI. An output decoder (605) decodes the equalized digital values, or intermediate digital values generated therefrom, into a stream of symbols. Equalization control circuitry (213, 214, and 217) adjusts equalization filter characteristics of the equalizers such that adjustments of the filter characteristics of the analog equalizer depend adaptively on adaptive adjustments of the filter characteristics of the digital equalizer.

    摘要翻译: 模拟均衡器(613和614)自适应地使受到符号间干扰(“ISI”)影响的输入模拟信号或由其产生的中间模拟信号进行均衡,以产生具有减少的ISI的滤波的部分均衡的模拟信号。 模数转换器(210)将经滤波的模拟信号或由其产生的中间模拟信号转换为初始数字信号。 数字均衡器(212)自适应地均衡初始数字信号或由其产生的中间数字信号,以产生均衡数字信号作为具有进一步减小的ISI的均衡数字值流。 输出解码器(605)将均衡的数字值或由其生成的中间数字值解码成符号流。 均衡控制电路(213,214和217)调整均衡器的均衡滤波器特性,使得模拟均衡器的滤波器特性的调整自适应地依赖于数字均衡器的滤波器特性的自适应调整。

    Receiver architecture using mixed analog and digital signal processing and method of operation
    6.
    发明授权
    Receiver architecture using mixed analog and digital signal processing and method of operation 有权
    接收机架构采用混合模拟和数字信号处理及操作方法

    公开(公告)号:US07065133B1

    公开(公告)日:2006-06-20

    申请号:US10878966

    申请日:2004-06-28

    IPC分类号: H04B1/38 H03H7/30

    CPC分类号: H04L25/45 H04B3/23

    摘要: There is disclosed a transceiver for use in a high speed Ethernet local area network (LAN). The transceiver comprises: 1) front-end analog signal processing circuitry comprising: a) a line driver for transmitting an outgoing analog signal to an external cable; b) a DC offset correction circuit for reducing a DC component in an incoming analog signal; c) an echo canceller; d) an automatic gain control (AGC) circuit; and e) an adaptive analog equalization filter. The transceiver also comprises: 2) an analog-to-digital converter (ADC) for converting the analog filter incoming signal to a first incoming digital signal; and 3) digital signal processing circuitry comprising: a) a digital finite impulse response (FIR) filter; b) a digital echo cancellation circuit to produce a reduced-echo incoming digital signal; c) a digital automatic gain control (AGC) circuit; and d) a digital base line wander circuit.

    摘要翻译: 公开了一种用于高速以太网局域网(LAN)的收发器。 收发器包括:1)前端模拟信号处理电路,包括:a)线路驱动器,用于将输出的模拟信号发送到外部电缆; b)用于减少输入模拟信号中的DC分量的DC偏移校正电路; c)回声消除器; d)自动增益控制(AGC)电路; 和e)自适应模拟均衡滤波器。 收发器还包括:2)用于将模拟滤波器输入信号转换为第一输入数字信号的模数转换器(ADC); 以及3)数字信号处理电路,包括:a)数字有限脉冲响应(FIR)滤波器; b)数字回声消除电路,用于产生减少回波的数字信号; c)数字自动增益控制(AGC)电路; 和d)数字基线漂移电路。

    Signal interface circuit with selectable signal interface parameters
    7.
    发明授权
    Signal interface circuit with selectable signal interface parameters 失效
    信号接口电路,具有可选择的信号接口参数

    公开(公告)号:US5598467A

    公开(公告)日:1997-01-28

    申请号:US353095

    申请日:1994-12-09

    IPC分类号: H04M1/58 H04M1/76

    CPC分类号: H04M1/585 H04M1/76

    摘要: A signal interface circuit with selectable signal interface parameters for a telephone subscriber line includes an impedance circuit having a selectable impedance value, signal terminals having an associated, definable termination impedance, a transmitter circuit having a definable transmitter transfer function and a receiver circuit having a definable receiver transfer function. The signal terminals connect to an external signal line pair having an associated line impedance for conducting outgoing and incoming signals therefrom and thereto, respectively. The transmitter circuit receives the outgoing signal from the signal terminals and provides a transmit signal in accordance with its transmitter transfer function. The receiver circuit, which includes a differential transconductance amplifier, receives an input signal and the transmit signal and provides the incoming signal to the signal terminals in accordance with its receiver transfer function. The termination impedance, transmitter transfer function and receiver transfer function are all defined by the selectable impedance, with the termination impedance defined to match the line impedance.

    摘要翻译: 具有用于电话用户线路的可选信号接口参数的信号接口电路包括具有可选阻抗值的阻抗电路,具有相关联的可定义终端阻抗的信号端子,具有可定义的发射机传输功能的发射机电路和具有可定义的可定义的接收机电路 接收机传递功能。 信号端子连接到具有相关联的线路阻抗的外部信号线对,分别用于传送和输入信号。 发射机电路接收来自信号终端的输出信号,并根据发射机传输功能提供发射信号。 包括差分跨导放大器的接收器电路接收输入信号和发送信号,并根据其接收器传递函数向信号端子提供输入信号。 终端阻抗,发射机传输功能和接收机传输功能都由可选阻抗定义,终端阻抗定义为匹配线路阻抗。

    Heart monitoring system or other system for measuring magnetic fields
    8.
    发明申请
    Heart monitoring system or other system for measuring magnetic fields 有权
    心脏监测系统或其他用于测量磁场的系统

    公开(公告)号:US20110152703A1

    公开(公告)日:2011-06-23

    申请号:US12927204

    申请日:2010-11-09

    摘要: A system includes at least one first magnetic field sensor configured to measure first and second magnetic fields. The system also includes at least one second magnetic field sensor configured to measure the second magnetic field substantially without measuring the first magnetic field. The system further includes processing circuitry configured to perform signal cancellation to generate measurements of the first magnetic field and to generate an output based on the measurements of the first magnetic field. The sensors could represent magneto-electric sensors. The magneto-electric sensors could be configured to up-convert electrical signals associated with the first and/or second magnetic fields to a higher frequency. The processing circuitry could be configured to identify one or more problems associated with a patient's heart.

    摘要翻译: 一种系统包括配置成测量第一和第二磁场的至少一个第一磁场传感器。 该系统还包括至少一个第二磁场传感器,其配置成基本上不测量第一磁场来测量第二磁场。 该系统还包括配置成执行信号消除以产生第一磁场的测量并且基于第一磁场的测量产生输出的处理电路。 传感器可以代表磁电传感器。 磁电传感器可以被配置为将与第一和/或第二磁场相关联的电信号上变频到更高的频率。 处理电路可以被配置为识别与患者心脏相关联的一个或多个问题。

    Magneto-electric sensor with injected up-conversion or down-conversion
    9.
    发明申请
    Magneto-electric sensor with injected up-conversion or down-conversion 有权
    具有注入上变频或下变频的磁电传感器

    公开(公告)号:US20110148403A1

    公开(公告)日:2011-06-23

    申请号:US12927205

    申请日:2010-11-09

    IPC分类号: G01N27/72

    摘要: A method includes generating an electrical signal representing a magnetic field using a magnetic field sensor having alternating layers of magneto-strictive material and piezo-electric material. The method also includes performing up-conversion or down-conversion so that the electrical signal representing the magnetic field has a higher or lower frequency than a frequency of the magnetic field. The up-conversion or down-conversion is performed before the magnetic field is converted into the electrical signal. The up-conversion or down-conversion could be performed by repeatedly sensitizing and desensitizing the magnetic field sensor. This could be done using a permanent magnet and an electromagnet, an electromagnet without a permanent magnet, or a movable permanent magnet. The up-conversion or down-conversion could also be performed by chopping the magnetic field. The chopping could involve intermittently shielding the magnetic field sensor from the magnetic field or moving the magnetic field sensor with respect to the magnetic field.

    摘要翻译: 一种方法包括使用具有交替的磁致伸缩材料层和压电材料的磁场传感器来产生表示磁场的电信号。 该方法还包括执行上变频或下变频,使得表示磁场的电信号具有比磁场频率更高或更低的频率。 在磁场转换成电信号之前执行上转换或下变频。 上转换或下转换可以通过使磁场传感器反复敏感和脱敏来进行。 这可以使用永磁体和电磁体,没有永磁体的电磁体或可动永磁体来完成。 也可以通过切割磁场来执行上变频或下变频。 斩波可能会将磁场传感器与磁场间断地屏蔽或相对于磁场移动磁场传感器。

    Receiver system having analog pre-filter and digital equalizer
    10.
    发明授权
    Receiver system having analog pre-filter and digital equalizer 有权
    接收机系统具有模拟预滤波器和数字均衡器

    公开(公告)号:US07254198B1

    公开(公告)日:2007-08-07

    申请号:US09561086

    申请日:2000-04-28

    IPC分类号: H04B1/10

    CPC分类号: H04L25/03057 H04L25/03254

    摘要: A receiver system suitable for a local area network contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605). A symbol-information-carrying input analog signal (yk), or a first intermediate analog signal generated from the input analog signal, is filtered by filtering circuitry in the pre-filter to produce a filtered analog signal (Zs) with reduced intersymbol interference. The filtering circuitry operates according to a transfer function such as (b1s+1)/(a2s2+a1s+1) or (1−Vc)+VcPF(s) where Vc is adaptively varied. The analog-to-digital converter provides analog-to-digital signal conversion. The equalizer provides digital signal equalization to produce an equalized digital signal (a′k) as a stream of equalized digital values. The decoder converts the equalized digital values, or intermediate digital values generated from the equalized digital values, into a stream of symbols.

    摘要翻译: 适用于局域网的接收机系统包含模拟预滤波器(207或619),模拟 - 数字转换器(210),数字均衡器(212)和解码器(605)。 由输入的模拟信号产生的符号信息输入模拟信号(或从输入的模拟信号产生的第一中间模拟信号)由预滤波器中的滤波电路进行滤波,以产生经滤波的模拟信号 (Z s S)具有减少的符号间干扰。 滤波电路根据传递函数进行操作,例如(b 1> 1 + 1)/(a 2< 2> 2< 1 + 1)或(1-V C c)+ V C c C(s)其中V C c C被自适应地变化 。 模数转换器提供模数转换。 均衡器提供数字信号均衡以产生均衡的数字信号(一个“k”)作为均衡数字值的流。 解码器将均衡的数字值或从均衡的数字值生成的中间数字值转换成符号流。