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    Hybrid molecular memory devices and methods of use thereof
    1.
    发明授权
    Hybrid molecular memory devices and methods of use thereof 失效
    混合分子记忆装置及其使用方法

    公开(公告)号：US06958485B2

    公开(公告)日：2005-10-25

    申请号：US10729144

    申请日：2003-12-05

    申请人： Veena Misra ,  Srivardhan Gowda ,  Guru Mathur

    发明人： Veena Misra ,  Srivardhan Gowda ,  Guru Mathur

    IPC分类号： G11C13/02 ,  H01L51/00 ,  H01L51/30 ,  H01L29/06

    CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C13/0009 ,  G11C2213/15 ,  H01L27/285 ,  H01L51/0077 ,  H01L51/0595

    摘要： The present invention provides hybrid microelectronic memory device, comprising: (a) a substrate having a surface, a first region of first work function adjacent the surface, and a second region of second work function adjacent the surface and adjacent the first region; (b) a film comprising redox-active molecules on the first and second regions; and (c) an electrode connected to the film. The present invention further provides a hybrid microelectronic memory device, comprising: (a) a substrate having surface and a structure or region such as a diode for increasing the retention time of the device formed adjacent the surface; (b) a film comprising redox-active molecules on or associated with the region or structure; and (c) an electrode connected to the redox active molecules opposite the substrate surface. Methods of using such devices are also described.

    摘要翻译： 本发明提供了一种混合式微电子存储装置，包括：（a）具有表面，邻近表面的第一功函数的第一区域和与表面相邻并邻近第一区域的第二功能函数的第二区域的衬底; （b）在第一和第二区域上包含氧化还原活性分子的膜; 和（c）连接到膜的电极。 本发明还提供了一种混合微电子存储器件，包括：（a）具有表面和诸如二极管的结构或区域的衬底的衬底，用于增加邻近表面形成的器件的保留时间; （b）在该区域或结构上或与该区域或结构相关联的包含氧化还原活性分子的膜; 和（c）连接到与衬底表面相对的氧化还原活性分子的电极。 还描述了使用这种装置的方法。

    Molecular memory devices including solid-state dielectric layers and related methods
    3.
    发明授权
    Molecular memory devices including solid-state dielectric layers and related methods 失效
    分子存储器件包括固态介质层和相关方法

    公开(公告)号：US07642546B2

    公开(公告)日：2010-01-05

    申请号：US11607503

    申请日：2006-11-30

    申请人： Veena Misra ,  Ritu Shrivastava ,  Zhong Chen ,  Guru Mathur

    发明人： Veena Misra ,  Ritu Shrivastava ,  Zhong Chen ,  Guru Mathur

    IPC分类号： H01L35/24

    CPC分类号： H01L51/0591 ,  B82Y10/00 ,  G11C11/005 ,  G11C13/0009 ,  G11C13/0016 ,  G11C13/0033 ,  G11C13/0069 ,  G11C16/3431 ,  H01L51/0558 ,  H01L51/0595 ,  Y10S977/809 ,  Y10S977/932 ,  Y10S977/936 ,  Y10S977/943

    摘要： According to some embodiments, an article of manufacture comprises a substrate; a molecular layer on the substrate comprising at least one charge storage molecule coupled to the substrate by a molecular linker; a solid barrier dielectric layer directly on the molecular layer; and a conductive layer directly on the solid barrier dielectric layer. In some embodiments, the solid barrier dielectric layer is configured to provide a voltage drop across the molecular layer that is greater than a voltage drop across the solid barrier dielectric layer when a voltage is applied to the conductive layer. In some embodiments, the molecular layer has a thickness greater than that of the solid barrier dielectric layer. The article of manufacture contains no electrolyte between the molecular layer and the conductive layer.

    摘要翻译： 根据一些实施例，制品包括基底; 所述底物上的分子层包含通过分子连接基与所述底物偶联的至少一个电荷存储分子; 直接在分子层上的固体阻挡介电层; 以及直接在固体阻挡介电层上的导电层。 在一些实施例中，固体阻挡介电层被配置为当电压施加到导电层时，跨越分子层提供大于固体阻挡介电层上的电压降的电压降。 在一些实施例中，分子层的厚度大于固体阻挡介电层的厚度。 该制品在分子层和导电层之间不含电解质。

    Molecular memory devices including solid-state dielectric layers and related methods
    4.
    发明申请
    Molecular memory devices including solid-state dielectric layers and related methods 失效
    分子存储器件包括固态介质层和相关方法

    公开(公告)号：US20070164374A1

    公开(公告)日：2007-07-19

    申请号：US11607503

    申请日：2006-11-30

    申请人： Veena Misra ,  Ritu Shrivastava ,  Zhong Chen ,  Guru Mathur

    发明人： Veena Misra ,  Ritu Shrivastava ,  Zhong Chen ,  Guru Mathur

    IPC分类号： H01L29/76 ,  H01L21/336

    CPC分类号： H01L51/0591 ,  B82Y10/00 ,  G11C11/005 ,  G11C13/0009 ,  G11C13/0016 ,  G11C13/0033 ,  G11C13/0069 ,  G11C16/3431 ,  H01L51/0558 ,  H01L51/0595 ,  Y10S977/809 ,  Y10S977/932 ,  Y10S977/936 ,  Y10S977/943

    摘要： According to some embodiments, an article of manufacture comprises a substrate; a molecular layer on the substrate comprising at least one charge storage molecule coupled to the substrate by a molecular linker; a solid barrier dielectric layer directly on the molecular layer; and a conductive layer directly on the solid barrier dielectric layer. In some embodiments, the solid barrier dielectric layer is configured to provide a voltage drop across the molecular layer that is greater than a voltage drop across the solid barrier dielectric layer when a voltage is applied to the conductive layer. In some embodiments, the molecular layer has a thickness greater than that of the solid barrier dielectric layer. The article of manufacture contains no electrolyte between the molecular layer and the conductive layer.

    摘要翻译： 根据一些实施例，制品包括基底; 所述底物上的分子层包含通过分子连接基与所述底物偶联的至少一个电荷存储分子; 直接在分子层上的固体阻挡介电层; 以及直接在固体阻挡介电层上的导电层。 在一些实施例中，固体阻挡介电层被配置为当电压施加到导电层时，跨越分子层提供大于固体阻挡介电层上的电压降的电压降。 在一些实施例中，分子层的厚度大于固体阻挡介电层的厚度。 该制品在分子层和导电层之间不含电解质。