公开(公告)号：US20160154744A1

公开(公告)日：2016-06-02

申请号：US14614797

申请日：2015-02-05

申请人： ViXS Systems Inc.

发明人： Heyun Zheng ,  Norman Stewart ,  Jing Zhang

IPC分类号： G06F12/14 ,  H04L9/14

CPC分类号： H04L9/0822 ,  G06F12/1408 ,  G06F21/10 ,  G06F2221/0755 ,  H04L9/088 ,  H04L9/0894 ,  H04L9/3247 ,  H04L2209/12 ,  H04L2209/60 ,  H04N21/4181 ,  H04N21/4183 ,  H04N21/42623 ,  H04N21/42692 ,  H04N21/4431 ,  H04N21/4435

摘要： A media processing device includes a one time programmable (OTP) memory to store a first set of cryptographic keys and rule set for the first set of cryptographic keys, a key store memory, and a rule set memory. The media processing device further includes an arbitration module to provision: a first segment of the key store memory to store cryptographic keys from the one-time programmable (OTP) memory; a first segment of the rule set memory to statically store rules for the cryptographic keys stored in the first segment of the key store memory; a second segment of the key store memory to store cryptographic keys; and a second segment of the rule set memory to store rules dynamically generated during operation of the media processing device for cryptographic keys stored in the second segment of the key store memory.

摘要翻译： 媒体处理设备包括一次性可编程（OTP）存储器，用于存储第一组加密密钥和第一组密码密钥的规则集，密钥存储存储器和规则集存储器。 媒体处理设备还包括仲裁模块，用于提供：密钥存储存储器的第一段以存储来自一次性可编程（OTP）存储器的加密密钥; 规则集存储器的第一段，以静态存储存储在密钥库存储器的第一段中的加密密钥的规则; 用于存储加密密钥的密钥存储存储器的第二段; 以及规则集存储器的第二段，以存储在存储在密钥存储器存储器的第二段中的加密密钥的媒体处理设备的操作期间动态生成的规则。

公开(公告)号：US20160014442A1

公开(公告)日：2016-01-14

申请号：US14687247

申请日：2015-04-15

申请人： ViXS Systems, Inc.

发明人： Kuldip Sahdra ,  Norman Stewart ,  Shijun D. Huang ,  Mang Lun A. Tong ,  Lewis Leung

IPC分类号： H04N21/418 ,  H04N21/4405 ,  H04N21/41 ,  H04N21/462 ,  H04N21/4363 ,  H04N21/436 ,  H04N21/482 ,  H04N21/4402

CPC分类号： H04N21/4183 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4081 ,  G06F13/409 ,  H04N21/4104 ,  H04N21/4126 ,  H04N21/4184 ,  H04N21/43615 ,  H04N21/43637 ,  H04N21/440218 ,  H04N21/44029 ,  H04N21/4405 ,  H04N21/4622 ,  H04N21/4821 ,  H04N21/631

摘要： A universal serial bus (USB) dongle device includes a USB interface for receiving a video signal in a first format and for sending a processed video signal in a second format wherein the first format differs from the second format. An encoding module generates the processed video signal based on the video signal. In a further embodiment, A video card includes a video receiver for receiving a video signal in a first format, based on a selection command. An encoding module generates a processed video signal in a second format based on the video signal, wherein the first format differs from the second format. A USB interface transfers the processed video signal to the host device, receives the selection command from the host device and receives a power signal from the host device to power the video receiver and the encoding module.

摘要翻译： 通用串行总线（USB）加密狗装置包括USB接口，用于以第一格式接收视频信号，并以第二格式发送处理后的视频信号，其中第一格式与第二格式不同。 编码模块基于视频信号生成经处理的视频信号。 在另一实施例中，视频卡包括用于基于选择命令以第一格式接收视频信号的视频接收器。 编码模块基于视频信号以第二格式生成经处理的视频信号，其中第一格式与第二格式不同。 USB接口将处理的视频信号传送到主机设备，从主机设备接收选择命令，并从主设备接收电源信号，为视频接收机和编码模块供电。

公开(公告)号：US20160315765A1

公开(公告)日：2016-10-27

申请号：US14614806

申请日：2015-02-05

申请人： ViXS Systems Inc.

发明人： Heyun Zheng ,  Norman Stewart ,  Jing Zhang

IPC分类号： H04L9/08

CPC分类号： G06F12/1408 ,  G06F21/602 ,  G06F21/6209 ,  G06F21/6281 ,  G06F21/72 ,  G06F21/79 ,  G06F2221/2127 ,  H04L9/0822 ,  H04L9/088 ,  H04L9/0894 ,  H04L9/3247 ,  H04L2209/12 ,  H04L2209/60 ,  H04N7/1675 ,  H04N21/4181 ,  H04N21/4183 ,  H04N21/42623 ,  H04N21/42692 ,  H04N21/4431 ,  H04N21/4435

摘要： A media processing device includes a key store memory to store a plurality of cryptographic keys and a rule set memory to store a plurality of rules for the plurality of cryptographic keys. The media processing device further includes an integrity module to determine a first cyclical redundancy check (CRC) value from the plurality of rules stored in the rule set memory and compare the first CRC with a second CRC value associated with the plurality of rules. The media processing device further includes an arbitration module to prevent further access to the plurality of rules in the rule set memory responsive to the integrity verification module signaling a mismatch between the first CRC and the second CRC.

摘要翻译： 媒体处理设备包括存储多个加密密钥的密钥存储存储器和用于存储多个加密密钥的多个规则的规则集存储器。 媒体处理设备还包括完整性模块，用于根据存储在规则集存储器中的多个规则来确定第一循环冗余校验（CRC）值，并将第一CRC与与多个规则相关联的第二CRC值进行比较。 该媒体处理设备还包括一个仲裁模块，用于防止对完整性验证模块进一步访问规则集存储器中的多个规则，以指示第一CRC与第二CRC之间的不匹配。

公开(公告)号：US09743126B2

公开(公告)日：2017-08-22

申请号：US14687247

申请日：2015-04-15

申请人： ViXS Systems, Inc.

发明人： Kuldip Sahdra ,  Norman Stewart ,  Shijun D. Huang ,  Mang Lun A. Tong ,  Lewis Leung

IPC分类号： G06F13/00 ,  H04N21/418 ,  H04N21/41 ,  H04N21/4402 ,  H04N21/63 ,  H04N21/436 ,  H04N21/4363 ,  H04N21/4405 ,  H04N21/462 ,  H04N21/482 ,  G06F13/40 ,  G06F13/38

CPC分类号： H04N21/4183 ,  G06F13/385 ,  G06F13/4045 ,  G06F13/4068 ,  G06F13/4081 ,  G06F13/409 ,  H04N21/4104 ,  H04N21/4126 ,  H04N21/4184 ,  H04N21/43615 ,  H04N21/43637 ,  H04N21/440218 ,  H04N21/44029 ,  H04N21/4405 ,  H04N21/4622 ,  H04N21/4821 ,  H04N21/631

摘要： A universal serial bus (USB) dongle device includes a USB interface for receiving a video signal in a first format and for sending a processed video signal in a second format wherein the first format differs from the second format. An encoding module generates the processed video signal based on the video signal. In a further embodiment, A video card includes a video receiver for receiving a video signal in a first format, based on a selection command. An encoding module generates a processed video signal in a second format based on the video signal, wherein the first format differs from the second format. A USB interface transfers the processed video signal to the host device, receives the selection command from the host device and receives a power signal from the host device to power the video receiver and the encoding module.

公开(公告)号：US09710651B2

公开(公告)日：2017-07-18

申请号：US14683288

申请日：2015-04-10

申请人： ViXS Systems Inc.

发明人： Norman Stewart ,  Jing Zhang ,  Heyun Zheng

IPC分类号： G06F9/24 ,  G06F15/177 ,  G06F21/57 ,  G06F12/14 ,  G06F21/44 ,  G06F3/06 ,  G06F12/06 ,  G06F9/44 ,  H04L9/08 ,  H04L9/32 ,  G06F21/72 ,  G06F21/34

CPC分类号： G06F21/575 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0665 ,  G06F3/0679 ,  G06F9/4411 ,  G06F12/0638 ,  G06F12/1408 ,  G06F21/34 ,  G06F21/44 ,  G06F21/72 ,  G06F2212/1052 ,  G06F2212/205 ,  H04L9/0863 ,  H04L9/32

摘要： An embedded system includes an interface to an external peripheral device storing secure boot code and a secure boot controller. The secure boot controller includes a secure central processing unit (CPU) having a processor core, a random access memory (RAM) coupled to the processor core, and a read only memory (ROM) coupled to the processor core. The ROM stores initialization firmware configured to manipulate the processor core to initiate transfer of a copy of the secure boot code from the external peripheral device to the RAM and to authenticate the secure boot code. The processor core further is to execute the secure boot code from the RAM to initialize the embedded system. After initialization of the embedded system is completed, the secure CPU can be repurposed to execute application code that has been stored to the RAM after initialization, the application code representing an independent software function.

公开(公告)号：US09501429B2

公开(公告)日：2016-11-22

申请号：US14614806

申请日：2015-02-05

申请人： ViXS Systems Inc.

发明人： Heyun Zheng ,  Norman Stewart ,  Jing Zhang

IPC分类号： G06F12/14 ,  H04L9/08 ,  G06F21/72 ,  G06F21/79 ,  H04L9/32 ,  H04N7/167 ,  H04N21/418 ,  H04N21/426 ,  H04N21/443 ,  G06F21/60 ,  G06F21/62

CPC分类号： G06F12/1408 ,  G06F21/602 ,  G06F21/6209 ,  G06F21/6281 ,  G06F21/72 ,  G06F21/79 ,  G06F2221/2127 ,  H04L9/0822 ,  H04L9/088 ,  H04L9/0894 ,  H04L9/3247 ,  H04L2209/12 ,  H04L2209/60 ,  H04N7/1675 ,  H04N21/4181 ,  H04N21/4183 ,  H04N21/42623 ,  H04N21/42692 ,  H04N21/4431 ,  H04N21/4435

摘要： A media processing device includes a key store memory to store a plurality of cryptographic keys and a rule set memory to store a plurality of rules for the plurality of cryptographic keys. The media processing device further includes an integrity module to determine a first cyclical redundancy check (CRC) value from the plurality of rules stored in the rule set memory and compare the first CRC with a second CRC value associated with the plurality of rules. The media processing device further includes an arbitration module to prevent further access to the plurality of rules in the rule set memory responsive to the integrity verification module signaling a mismatch between the first CRC and the second CRC.

摘要翻译： 媒体处理设备包括存储多个加密密钥的密钥存储存储器和用于存储多个加密密钥的多个规则的规则集存储器。 媒体处理设备还包括完整性模块，用于根据存储在规则集存储器中的多个规则来确定第一循环冗余校验（CRC）值，并将第一CRC与与多个规则相关联的第二CRC值进行比较。 该媒体处理设备还包括一个仲裁模块，用于防止对完整性验证模块进一步访问规则集存储器中的多个规则，以指示第一CRC与第二CRC之间的不匹配。

公开(公告)号：US20160300064A1

公开(公告)日：2016-10-13

申请号：US14683288

申请日：2015-04-10

申请人： ViXS Systems Inc.

发明人： Norman Stewart ,  Jing Zhang ,  Heyun Zheng

IPC分类号： G06F21/57 ,  G06F9/44 ,  G06F3/06 ,  G06F12/06 ,  G06F12/14 ,  G06F21/44

CPC分类号： G06F21/575 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0665 ,  G06F3/0679 ,  G06F9/4411 ,  G06F12/0638 ,  G06F12/1408 ,  G06F21/34 ,  G06F21/44 ,  G06F21/72 ,  G06F2212/1052 ,  G06F2212/205 ,  H04L9/0863 ,  H04L9/32

摘要： An embedded system includes an interface to an external peripheral device storing secure boot code and a secure boot controller. The secure boot controller includes a secure central processing unit (CPU) having a processor core, a random access memory (RAM) coupled to the processor core, and a read only memory (ROM) coupled to the processor core. The ROM stores initialization firmware configured to manipulate the processor core to initiate transfer of a copy of the secure boot code from the external peripheral device to the RAM and to authenticate the secure boot code. The processor core further is to execute the secure boot code from the RAM to initialize the embedded system. After initialization of the embedded system is completed, the secure CPU can be repurposed to execute application code that has been stored to the RAM after initialization, the application code representing an independent software function.

摘要翻译： 嵌入式系统包括与存储安全引导代码的外部外围设备的接口和安全引导控制器。 安全引导控制器包括具有处理器核心的安全中央处理单元（CPU），耦合到处理器核心的随机存取存储器（RAM）以及耦合到处理器核心的只读存储器（ROM）。 ROM存储被配置为操纵处理器核心的初始化固件，以启动将安全引导代码的副本从外部外围设备传送到RAM并验证安全启动代码。 处理器核心还是从RAM执行安全引导代码来初始化嵌入式系统。 嵌入式系统初始化完成后，安全CPU可以重新利用，执行初始化后存储到RAM的应用代码，应用代码代表独立的软件功能。

公开(公告)号：US09432184B2

公开(公告)日：2016-08-30

申请号：US14614797

申请日：2015-02-05

申请人： ViXS Systems Inc.

发明人： Heyun Zheng ,  Norman Stewart ,  Jing Zhang

IPC分类号： H04L9/08

CPC分类号： H04L9/0822 ,  G06F12/1408 ,  G06F21/10 ,  G06F2221/0755 ,  H04L9/088 ,  H04L9/0894 ,  H04L9/3247 ,  H04L2209/12 ,  H04L2209/60 ,  H04N21/4181 ,  H04N21/4183 ,  H04N21/42623 ,  H04N21/42692 ,  H04N21/4431 ,  H04N21/4435

摘要： A media processing device includes a one time programmable (OTP) memory to store a first set of cryptographic keys and rule set for the first set of cryptographic keys, a key store memory, and a rule set memory. The media processing device further includes an arbitration module to provision: a first segment of the key store memory to store cryptographic keys from the one-time programmable (OTP) memory; a first segment of the rule set memory to statically store rules for the cryptographic keys stored in the first segment of the key store memory; a second segment of the key store memory to store cryptographic keys; and a second segment of the rule set memory to store rules dynamically generated during operation of the media processing device for cryptographic keys stored in the second segment of the key store memory.

摘要翻译： 媒体处理设备包括一次性可编程（OTP）存储器，用于存储第一组加密密钥和第一组密码密钥的规则集，密钥存储存储器和规则集存储器。 媒体处理设备还包括仲裁模块，用于提供：密钥存储存储器的第一段以存储来自一次性可编程（OTP）存储器的加密密钥; 规则集存储器的第一段，以静态存储存储在密钥库存储器的第一段中的加密密钥的规则; 用于存储加密密钥的密钥存储存储器的第二段; 以及规则集存储器的第二段，以存储在存储在密钥存储器存储器的第二段中的加密密钥的媒体处理设备的操作期间动态生成的规则。