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公开(公告)号:US20190033953A1
公开(公告)日:2019-01-31
申请号:US15819552
申请日:2017-11-21
申请人: Vijaykumar B. Kadgi , Barnes Cooper , Nivedita Aggarwal , Venkataramani Gopalakrishnan , Jenn Chuan Cheng , Basavaraj Astekar , Charuhasini Sunderraman , Han Kung Chua , Anil Baby , Tin-Cheung Kung , Chia-Hung Kuo
发明人: Vijaykumar B. Kadgi , Barnes Cooper , Nivedita Aggarwal , Venkataramani Gopalakrishnan , Jenn Chuan Cheng , Basavaraj Astekar , Charuhasini Sunderraman , Han Kung Chua , Anil Baby , Tin-Cheung Kung , Chia-Hung Kuo
摘要: Techniques are provided for managing power delivery to multiple universal serial bus (USB) type-C ports of a desktop computer system. In an example, a method can include providing a first power level to a USB power delivery controller during a non-sleep mode operation of the desktop computer, and providing a second power level to the USB power delivery controller when the computer is in a sleep mode, the second power level configured to provide default charge power to a connected device when the computer is in the sleep mode.
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公开(公告)号:US20180081843A1
公开(公告)日:2018-03-22
申请号:US15278128
申请日:2016-09-28
CPC分类号: G06F13/385 , G06F9/4411 , G06F11/3051 , G06F13/20 , G06F2213/0042
摘要: Various techniques for enabling the control and monitoring of a USB device mode controller to a USB-C connector, for the performance of a USB device mode data connection, are disclosed herein. In an example, a computing system that includes multiple USB-C connectors but a single USB device mode controller may manage the mapping of the controller to a particular connector, through operations that identify the mapping and the characteristics of the connector, process a request to change the mapping of the device mode controller, and perform the change to the mapping of the device mode controller. Such a change may include a disconnection or reassignment of a particular USB-C connector to the controller. Further examples to determine the availability of a USB device mode controller, and respond to a scenario where the USB device mode controller is not available, are also disclosed.
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公开(公告)号:US20150378747A1
公开(公告)日:2015-12-31
申请号:US14318129
申请日:2014-06-27
申请人: Giri P. Mudusuru , Rangasai V. Chaganty , Chasel Chiu , Satya P. Yarlagadda , Nivedita Aggarwal , Nuo Zhang
发明人: Giri P. Mudusuru , Rangasai V. Chaganty , Chasel Chiu , Satya P. Yarlagadda , Nivedita Aggarwal , Nuo Zhang
CPC分类号: G06F9/4401 , G06F3/0619 , G06F3/065 , G06F3/0679 , G06F9/4403
摘要: Technologies for pre-memory phase initialization include a computing device having a processor with a cache memory. The computing device may determine whether a temporary memory different from the cache memory of the processor is present for temporary memory access prior to initialization of a main memory of the computing device. In response to determining that temporary memory is present, a portion of the basic input/output instructions may be copied from a non-volatile memory of the computing device to the temporary memory for execution prior to initialization of the main memory. The computing device may also initialize a portion of the cache memory of the processor as Cache as RAM for temporary memory access prior to initialization of the main memory in response to determining that temporary memory is not present. After initialization, the main memory may be configured for subsequent memory access. Other embodiments are described and claimed.
摘要翻译: 用于预存储器相位初始化的技术包括具有具有高速缓存存储器的处理器的计算设备。 在初始化计算设备的主存储器之前,计算设备可以确定是否存在与处理器的高速缓冲存储器不同的临时存储器用于临时存储器访问。 响应于确定存在临时存储器,可以在初始化主存储器之前将基本输入/输出指令的一部分从计算设备的非易失性存储器复制到临时存储器以供执行。 响应于确定临时存储器不存在,计算设备还可以在处理器的初始化之前将处理器的高速缓冲存储器的一部分初始化为高速缓冲存储器作为用于临时存储器访问的RAM。 初始化之后,可以将主存储器配置为用于后续存储器访问。 描述和要求保护其他实施例。
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