公开(公告)号：US20240088800A1

公开(公告)日：2024-03-14

申请号：US17932079

申请日：2022-09-14

Applicant: VIRGINIA TECH INTELLECTUAL PROPERTIES, INC.

Inventor： Boran Fan ,  Dushan Boroyevich ,  Rolando Burgos ,  Jayesh Kumar Motwani ,  Jun Wang

IPC: H02M7/483 ,  H02M1/00 ,  H02M7/5395

CPC classification number: H02M7/4835 ,  H02M1/0043 ,  H02M7/5395

Abstract: Aspects of switching-cycle voltage deviation control for modular multilevel converters (MMCs) are described. In one example, an upper switching action of an upper power cell is determined within a time duration of a switching cycle for an MMC. In addition, a lower switching action of a lower power cell is determined within the time duration of the switching cycle for the MMC. In addition, a delay is generated between the upper switching action and the lower switching action to reduce capacitor voltage deviation between the upper power cell and the lower power cell during the switching cycle. The upper power cell is located in an upper arm of a phase leg of the MMC, while the lower power cell is located in a lower arm of the phase leg of the MMC.

公开(公告)号：US10032732B1

公开(公告)日：2018-07-24

申请号：US15585545

申请日：2017-05-03

Applicant: Virginia Tech Intellectual Properties, Inc.

Inventor： Christina DiMarino ,  Dushan Boroyevich ,  Rolando Burgos ,  Mark Johnson

IPC: H01L23/66 ,  H01L23/48 ,  H01L25/065 ,  H05K3/46 ,  H05K1/16

Abstract: In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating substrate presenting a parasitic capacitance placed in series with the low impedance current path and a connection of a conductive layer to input voltage rails using a single decoupling capacitor or, preferably, a midpoint of the voltage rails formed by a series connection of decoupling capacitors maintains a large portion of common mode (CM) currents which are due to high dV/dt slew rates of SiC and GaN transistors within the switching module.

公开(公告)号：US20140312882A1

公开(公告)日：2014-10-23

申请号：US13910371

申请日：2013-06-05

Applicant: Virginia Tech Intellectual Properties, Inc.

Inventor： Dong Dong ,  Dushan Boroyevich ,  Paolo Mattavelli ,  Bo Wen

IPC: G01R23/00 ,  H03L7/08

CPC classification number: H03L7/08 ,  G01R31/42 ,  H02J3/382 ,  H02J2003/388

Abstract: A small signal feedback loop or feed-forward loop having gain provides substantially unconditional instability in a phase locked loop when a reference phase signal is lost. The small signal feedback or feed-forward also modifies phase locked loop bandwidth when the reference phase signal is lost to increase rapidity of response to loss of reference phase signal while maintaining insensitivity to reference voltage amplitude change while the reference phase signal is present. The performance thus achieved is particularly suitable for rapid condition detection response and control of a grid connected power converter under islanding conditions.

Abstract translation: 当参考相位信号丢失时，具有增益的小信号反馈回路或前馈回路在锁相环中提供基本上无条件的不稳定性。 当参考相位信号丢失时，小信号反馈或前馈也会修改锁相环带宽，以增加对参考相位信号丢失的响应速度，同时在参考相位信号存在的同时保持对参考电压幅度变化的不敏感性。 这样实现的性能特别适用于孤岛状态下并网功率转换器的快速状态检测响应和控制。

公开(公告)号：US11368103B2

公开(公告)日：2022-06-21

申请号：US15931795

申请日：2020-05-14

Applicant: Virginia Tech Intellectual Properties, Inc.

Inventor： Jun Wang ,  Rolando Burgos ,  Dushan Boroyevich

IPC: H02M7/483 ,  H02M1/08

Abstract: Aspects of hybrid-current-mode switching-cycle control are described. In one embodiment, a peak current mode is selected to control a switching power cell. The switching power cell is in an arm of a phase leg of a modular multilevel converter. The phase leg includes an upper arm and a lower arm, and the switching power cell includes a capacitor and at least one switch. At least one switch control signal switches the switching power cell according to a peak current mode based on at least one arm current boundary crossing identified for the arm.

公开(公告)号：US09966874B2

公开(公告)日：2018-05-08

申请号：US14578651

申请日：2014-12-22

Applicant: Virginia Tech Intellectual Properties, Inc.

Inventor： Jun Wang ,  Rolando Burgos ,  Dushan Boroyevich ,  Bo Wen

IPC: H02M7/483 ,  H02M1/00

CPC classification number: H02M7/483 ,  H02M2001/0003 ,  H02M2007/4835

Abstract: In a modular multi-level power converter, additional switching states are interleaved between main switching states that control output voltage or waveform. The additional switching states provide current from a DC-link to charge capacitors in respective modules or cells to an offset voltage from which the capacitor voltages are controlled toward a reference voltage during each switching cycle rather than being allowed to build up over a period of an output waveform of variable line frequency, possibly including zero frequency. Since the switching cycle is much shorter than the duration of a line frequency cycle and the capacitor voltages are balanced during each switching cycle, output voltage ripple can be limited as desired with a capacitor of much smaller value and size than would otherwise be required.

公开(公告)号：US20150207434A1

公开(公告)日：2015-07-23

申请号：US14578651

申请日：2014-12-22

Applicant: Virginia Tech Intellectual Properties, Inc.

Inventor： Jun Wang ,  Rolando Burgos ,  Dushan Boroyevich ,  Bo Wen

IPC: H02M7/797

CPC classification number: H02M7/483 ,  H02M2001/0003 ,  H02M2007/4835

Abstract: In a modular multi-level power converter, additional switching states are interleaved between main switching states that control output voltage or waveform. The additional switching states provide current from a DC-link to charge capacitors in respective modules or cells to an offset voltage from which the capacitor voltages are controlled toward a reference voltage during each switching cycle rather than being allowed to build up over a period of an output waveform of variable line frequency, possibly including zero frequency. Since the switching cycle is much shorter than the duration of a line frequency cycle and the capacitor voltages are balanced during each switching cycle, output voltage ripple can be limited as desired with a capacitor of much smaller value and size than would otherwise be required.

Abstract translation: 在模块化多电平功率转换器中，额外的开关状态在控制输出电压或波形的主开关状态之间交错。 额外的开关状态提供来自DC链路的电流，以将各个模块或单元中的电容器充电到偏移电压，在每个开关周期期间电容器电压从该偏置电压控制到参考电压，而不是允许在 可变线路频率的输出波形，可能包括零频率。 由于开关周期比线路频率周期的持续时间短得多，并且在每个开关周期期间电容器电压平衡，因此可以根据需要以比其它方式要求的更小的值和尺寸的电容器来限制输出电压纹波。

公开(公告)号：US20140032148A1

公开(公告)日：2014-01-30

申请号：US13954014

申请日：2013-07-30

Applicant: Virginia Tech Intellectual Properties, Inc. ,  Huntington Ingalls, Inc.

Inventor： Jacob Verhulst ,  Mohamed Belkhayat ,  Zhiyu Shen ,  Marko Jaksic ,  Paolo Mattavelli ,  Dushan Boroyevich

IPC: G01R27/16

CPC classification number: G01R29/26 ,  G01R27/02 ,  G01R27/16

Abstract: A method for impedance measurement in a three-phase AC system is provided. The method includes injecting a shunt perturbation signal into the three-phase AC system and collecting a response to the shunt perturbation signal, and injecting a series perturbation signal into the three-phase AC system and collecting a response to the series perturbation signal. The response to the shunt perturbation signal and the response to the series perturbation signal are then transferred from abc coordinate to dq coordinates. At least one impedance of the three-phase AC system is calculated based on the response to the shunt perturbation signal and the response to the series perturbation signal.

Abstract translation: 提供了一种三相交流系统中的阻抗测量方法。 该方法包括将分流扰动信号注入到三相交流系统中并收集对分流扰动信号的响应，并将一系列扰动信号注入到三相交流系统中并收集对串联扰动信号的响应。 对分流扰动信号的响应和对串联扰动信号的响应然后从abc坐标传递到dq坐标。 基于对分流扰动信号的响应和对串联扰动信号的响应，计算三相AC系统的至少一个阻抗。

公开(公告)号：US12003114B2

公开(公告)日：2024-06-04

申请号：US16913066

申请日：2020-06-26

Applicant: VIRGINIA TECH INTELLECTUAL PROPERTIES, INC.

Inventor： Keyao Sun ,  Jun Wang ,  Rolando Burgos ,  Dushan Boroyevich

IPC: H02J50/12 ,  H02M7/5387

CPC classification number: H02J50/12 ,  H02M7/5387

Abstract: Aspects of an efficient compensation network for reducing reactive power in a wireless power transfer (WPT) system are disclosed. The compensation network comprises a series/series (S/S) constant current (CC) source, a reactive power compensation capacitor, and a constant current (CC)-to-constant voltage (CV) network. In an example, the S/S CC source comprises a first capacitor connected in series with a first inductor on a primary side of a transformer and a second inductor on a secondary side of the transformer. The S/S CC source converts an input voltage signal of the WPT system into a constant alternating current (AC) current signal. In an example, the CC-to-CV network comprises at least a third capacitor and a third inductor. The CC-to-CV network converts the constant AC current signal into a constant AC voltage signal.

公开(公告)号：US20230369969A1

公开(公告)日：2023-11-16

申请号：US17933312

申请日：2022-09-19

Applicant: VIRGINIA TECH INTELLECTUAL PROPERTIES, INC.

Inventor： Keyao Sun ,  Rolando Burgos ,  Dushan Boroyevich

IPC: H02M3/00 ,  H02M1/00 ,  H02M3/158

CPC classification number: H02M3/015 ,  H02M1/0025 ,  H02M3/158

Abstract: Topologies and configurations of step-down power supplies including unidirectional balancing cells are described. In one example, a step-down power supply includes an input and an output, a string of series-connected capacitors, and a plurality of unidirectional balancing cells coupled to the capacitors in the string of series-connected capacitors. A first balancing can be configured to transfer power, unilaterally, in a first direction among at least two capacitors in the string of series-connected capacitors, and a second balancing cell can be configured to transfer power, unilaterally, in a second direction among at least two capacitors in the string of series-connected capacitors, where the first direction is different than the second direction. The power supply can also include a gate controller for a balancing cell. The gate controller generates switching control signals at a first switching frequency that is decoupled from a resonant frequency of a balancing branch in the balancing cell.

公开(公告)号：US20210408923A1

公开(公告)日：2021-12-30

申请号：US16913066

申请日：2020-06-26

Applicant: VIRGINIA TECH INTELLECTUAL PROPERTIES, INC.

Inventor： Keyao Sun ,  Jun Wang ,  Rolando Burgos ,  Dushan Boroyevich

IPC: H02M3/335 ,  H02M7/5387 ,  H02M7/219 ,  H02J50/12 ,  H02M1/12

Abstract: Aspects of an efficient compensation network for reducing reactive power in a wireless power transfer (WPT) system are disclosed. The compensation network comprises a series/series (S/S) constant current (CC) source, a reactive power compensation capacitor, and a constant current (CC)-to-constant voltage (CV) network. In an example, the S/S CC source comprises a first capacitor connected in series with a first inductor on a primary side of a transformer and a second inductor on a secondary side of the transformer. The S/S CC source converts an input voltage signal of the WPT system into a constant alternating current (AC) current signal. In an example, the CC-to-CV network comprises at least a third capacitor and a third inductor. The CC-to-CV network converts the constant AC current signal into a constant AC voltage signal.