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公开(公告)号：US11050457B2
公开(公告)日：2021-06-29
申请号：US16889716
申请日：2020-06-01
申请人： Vivek Mangal , Peter R. Kinget
发明人： Vivek Mangal , Peter R. Kinget
摘要： Circuits for continuous-time analog correlators are provided, comprising: a first VCO that receives an input signal and that outputs a first pulse frequency modulated (PFM) output signal; a second VCO that receives a reference signal and that outputs a second PFM output signal; a first phase frequency detector (PFD) that receives the first PFM output signal and the second PFM output signal and that produces a first PFD output signal; a first delay cell that receives the first PFM output signal and that produces a first delayed signal (DS); a second delay cell that receives the second PFM output signal and that produces a second DS; a second PFD that receives the first DS and the second DS and that produces a second PFD output signal; and a capacitor-digital-to-analog converter (capacitor-DAC) that receives the first PFD output signal and the second PFD output signal and that produces a correlator output.
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公开(公告)号：US20200382154A1
公开(公告)日：2020-12-03
申请号：US16889716
申请日：2020-06-01
申请人： Vivek Mangal , Peter R. Kinget
发明人： Vivek Mangal , Peter R. Kinget
摘要： Circuits for continuous-time analog correlators are provided, comprising: a first VCO that receives an input signal and that outputs a first pulse frequency modulated (PFM) output signal; a second VCO that receives a reference signal and that outputs a second PFM output signal; a first phase frequency detector (PFD) that receives the first PFM output signal and the second PFM output signal and that produces a first PFD output signal; a first delay cell that receives the first PFM output signal and that produces a first delayed signal (DS); a second delay cell that receives the second PFM output signal and that produces a second DS; a second PFD that receives the first DS and the second DS and that produces a second PFD output signal; and a capacitor-digital-to-analog converter (capacitor-DAC) that receives the first PFD output signal and the second PFD output signal and that produces a correlator output.
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公开(公告)号：US20180287559A1
公开(公告)日：2018-10-04
申请号：US15765795
申请日：2016-10-04
申请人： Jianxun Zhu , Peter R. Kinget
发明人： Jianxun Zhu , Peter R. Kinget
摘要： Circuit for wireless communication are provided, the circuits comprising: a first quadrature hybrid having a first in port, a first iso port, a first cpl port, and a first thru port; a first mixer having a first input coupled to the first cpl port and having an output; a second mixer have a first input coupled to the first cpl port and having an output; a third mixer having a first input coupled to the first thru port and having an output; a fourth mixer having a first input coupled to the first thru port and having an output; and a first complex combiner having inputs coupled to the output of the first mixer, the output of the second mixer, the output of the third mixer, and the output of the fourth mixer that provides first I and Q outputs based the output of the first mixer and the output of the second mixer.
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公开(公告)号：US09755590B2
公开(公告)日：2017-09-05
申请号：US15107863
申请日：2014-12-24
申请人： Baradwaj Vigraham , Peter R. Kinget
发明人： Baradwaj Vigraham , Peter R. Kinget
CPC分类号： H03F3/193 , H03F1/565 , H03F3/19 , H03F3/211 , H03F2200/222 , H03F2200/294 , H03F2200/541 , H03F2200/78 , H03H11/28
摘要： Low noise amplifiers (LNAs) are provided, the LNAs comprising: a common gate matching network; a capacitord; a resistord; a coild, wherein a side1 of coild is coupled to a side1 of capacitord, a side1 of resistord, and a V+ and a side2 of the coild is coupled to a side2 of capacitord, a side2 of resistord, and a network input; a capacitors; a resistors; a coils, wherein a side1 of coils is coupled to an LNA input, a side1 of capacitors, a side1 of resistors, and a network output and a side2 of coils is coupled to a side2 of the capacitors, a side2 of resistors, and ground; and an output coil that is magnetically coupled to coild and coils and having a side1 coupled to a first terminal of an LNA output and a side2 coupled to a second terminal of the LNA output.
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公开(公告)号：US11374599B2
公开(公告)日：2022-06-28
申请号：US16331086
申请日：2017-10-23
申请人： Tanbir Haque , Peter R. Kinget , Matthew W. Bajor
发明人： Tanbir Haque , Peter R. Kinget , Matthew W. Bajor
摘要： Circuits for identifying interferers using compressed-sampling, comprising: a low noise amplifier (LNA); a passive mixer having a first input coupled to an output of the LNA; a local oscillator (LO) source having an output coupled to a second input of the passive mixer; a low pass filter having an input coupled to an output of the passive mixer; an analog-to-digital converter (ADC) having an input coupled to the output of the low pass filter; a digital baseband (DBB) circuit having an input coupled to an output of the ADC; and a compression-sampling digital-signal-processor (DSP) having an input coupled to the output of the DBB circuit, wherein the compression-sampling DSP is configured to output identifiers of frequency locations of interferers, wherein, in a first mode, the LO source outputs a modulated LO signal that is formed by modulating an LO signal with a pseudo-random sequence.
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公开(公告)号：US20200099338A1
公开(公告)日：2020-03-26
申请号：US16579782
申请日：2019-09-23
申请人： Guoxiang Han , Tanbir Haque , Peter R. Kinget
发明人： Guoxiang Han , Tanbir Haque , Peter R. Kinget
摘要： Circuits comprising: a plurality of LNTA branches, each comprising: a cascode common-source (CCS) LNTA, a plurality of passive mixers (PMs), and a plurality of baseband two-stage Miller compensated TIAs (BB2S-TIAs); a plurality of mixer-first branches, each comprising: a plurality of RF switches, a plurality of baseband folded-cascode TIAs (BBFC-TIAs), and a plurality of Cherry-Hooper amplifiers, wherein an input to each of the BBFC-TIAs is provided by an output of at least one of the RF switches, and an input to each of the amplifiers is provided by an output of a corresponding one of the BBFC-TIAs; a first plurality of clock modulators that provide first non-overlapping modulated clocks that are provided to an input of the PMs; and a second plurality of clock modulators that provide a plurality of tri-level modulated mixer clocks that control the switching of the RF switches.
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公开(公告)号：US10122396B2
公开(公告)日：2018-11-06
申请号：US15510910
申请日：2015-09-14
摘要： Mechanisms for interferer detection can detect interferers by detecting elevated signal amplitudes in one or more of a plurality of bins (or bands) in a frequency range between a maximum frequency (fMAX) and a minimum frequency (fMIN). To perform rapid interferer detection, the mechanisms downconvert an input signal x(t) with a local oscillator (LO) to a complex baseband signal xI(t)+jxQ(t). xI(t) and xQ(t) are then multiplied by m unique pseudorandom noise (PN) sequences (e.g., Gold sequences) gm(t) to produce m branch signals for I and m branch signals for Q. The branch signals are then low pass filtered, converted from analog to digital form, and pairwise combined by a pairwise complex combiner. Finally, a support recovery function is used to identify interferers.
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公开(公告)号：US20180219567A1
公开(公告)日：2018-08-02
申请号：US15676610
申请日：2017-08-14
IPC分类号： H04B1/10 , H04B17/345 , H04J13/00
CPC分类号： H04B1/1027 , H04B17/345 , H04J13/0029
摘要： Mechanisms for interferer detection can detect interferers by detecting elevated signal amplitudes in one or more of a plurality of bins (or bands) in a frequency range between a maximum frequency (fMAX) and a minimum frequency (fMIN). To perform rapid interferer detection, the mechanisms downconvert an input signal x(t) with a local oscillator (LO) to a complex baseband signal xI(t)+jxQ(t). xI(t) and xQ(t) are then multiplied by m unique pseudorandom noise (PN) sequences (e.g., Gold sequences) gm(t) to produce m branch signals for I and m branch signals for Q. The branch signals are then low pass filtered, converted from analog to digital form, and pairwise combined by a pairwise complex combiner. Finally, a support recovery function is used to identify interferers.
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公开(公告)号：US20170250716A1
公开(公告)日：2017-08-31
申请号：US15510910
申请日：2015-09-14
CPC分类号： H04B1/1036 , H03D7/161 , H03F3/19 , H03F2200/294 , H03F2200/451 , H04B1/0017 , H04B1/1027 , H04B17/345 , H04L27/22
摘要： Mechanisms for interferer detection can detect interferers by detecting elevated signal amplitudes in one or more of a plurality of bins (or bands) in a frequency range between a maximum frequency (fMAX) and a minimum frequency (fMIN). To perform rapid interferer detection, the mechanisms downconvert an input signal x(t) with a local oscillator (LO) to a complex baseband signal xI(t)+jxQ(t). xI(t) and xQ(t) are then multiplied by m unique pseudorandom noise (PN) sequences (e.g., Gold sequences) gm(t) to produce m branch signals for I and m branch signals for Q. The branch signals are then low pass filtered, converted from analog to digital form, and pairwise combined by a pairwise complex combiner. Finally, a support recovery function is used to identify interferers.
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公开(公告)号：US08441287B2
公开(公告)日：2013-05-14
申请号：US11663373
申请日：2005-09-20
申请人： Shouri Chatterjee , Peter R. Kinget
发明人： Shouri Chatterjee , Peter R. Kinget
CPC分类号： H03K5/22 , H03F3/45071 , H03F2200/331
摘要： Circuits that operate with power supplies of less than 1 Volt are presented. More particularly, circuits that operate with supply voltages near or lower than the threshold voltage of the transistors in those circuits are presented. Various circuits and embodiments such as operational transconductance amplifiers, biasing circuits, integrators, continuous-time sigma delta modulators, track-and-hold circuits, and others are presented. The techniques and circuits can be used in a wide range of applications and various transistors from metal-oxide-semiconductor to bipolar junction transistors may implement the techniques presented herein.
摘要翻译： 介绍使用电源小于1伏的电路。 更具体地，提供了在这些电路中接近或低于晶体管的阈值电压的电源电压下工作的电路。 提出了诸如运算跨导放大器，偏置电路，积分器，连续时间Σ-Δ调制器，跟踪和保持电路等各种电路和实施例。 技术和电路可以用于广泛的应用中，并且从金属氧化物半导体到双极结型晶体管的各种晶体管可以实现本文提出的技术。
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