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公开(公告)号：US20190245490A1
公开(公告)日：2019-08-08
申请号：US16314109
申请日：2017-07-04
申请人： WUPATEC
发明人： Emmanuel GATARD , Pierre LACHAUD
CPC分类号： H03F1/0227 , H01Q1/50 , H03F1/025 , H03F1/32 , H03F3/189 , H03F3/24 , H03F3/245 , H03F2200/102 , H03F2200/451 , H03F2200/511 , H03F2201/3215 , H04L27/2614
摘要： A system for monitoring the peak power of a telecommunication signal to be transmitted for an RF power amplification, includes a digital processing device with a processing chain having an envelope tracking control logic for generating an envelope tracking control signal at discrete levels. The processing chain further includes a driver logic of the DC-DC converter, which processing chain has a device for calculating peak value over a sliding time window and a supply voltage selection device.
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公开(公告)号：US20170373644A1
公开(公告)日：2017-12-28
申请号：US15543887
申请日：2016-01-11
申请人： WUPATEC
发明人： Emmanuel GATARD , Pierre LACHAUD
CPC分类号： H03F1/0227 , H02M3/156 , H03F1/025 , H03F3/189 , H03F3/19 , H03F3/24 , H03F3/245 , H03F2200/102 , H03F2200/336 , H03F2200/451 , H03F2200/465 , H04B1/0475 , H04B2001/0408 , H04B2001/0425 , H04W52/367
摘要： Disclosed is a system for monitoring the peak power of a telecommunication signal to be transmitted for RF power amplification of the telecommunication signal to be transmitted, including a digital processing device, a digital to RF converter and a dc-dc converter, wherein the output of the dc-dc converter can take a discrete voltage value from N discrete voltage values, N being an integer equal to or greater than 2, the digital processing device including a processing path including an envelope tracking control logic adapted to create a continuous envelope tracking control signal. The processing path further includes logic for driving the dc-dc converter including a peak value calculating device and a power supply voltage selecting device.
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公开(公告)号：US20210234515A1
公开(公告)日：2021-07-29
申请号：US17050220
申请日：2019-04-23
申请人： WUPATEC
发明人： Emmanuel GATARD , Pierre LACHAUD
摘要： Disclosed is a system and a method of baseband linearization for a class G radiofrequency power amplifier, the linearization system including a module for selecting the amplifier power supply voltage, a digital predistortion module, and a module for extracting predistortion coefficients, wherein the linearization system also includes a digital filter with complex coefficients, the input of which is connected to the output of the digital predistortion module, and a module for extracting filter coefficients which is designed to extract filter coefficients used by the digital filter with complex coefficients.
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公开(公告)号：US20180309410A1
公开(公告)日：2018-10-25
申请号：US15779338
申请日：2016-11-25
申请人： WUPATEC
发明人： Emmanuel GATARD , Pierre LACHAUD
摘要： A DC-to-DC converter block with multiple supply voltages includes a power circuit, the power circuit including N depletion-mode HEMT transistors (T3_1, T3_2, T3_N), N being a natural number greater than or equal to 3. The DC-to-DC converter block also includes a gate drive circuit for the N depletion-mode HEMT transistors (T3_1, T3_2, T3_N) of the power circuit, the drive circuit including depletion-mode HEMT transistors (T1_1, T2_1, T1_2, T2_2, T1_N, T2_N) configured to drive the gates of the N depletion-mode HEMT transistors (T3_1, T3_2, T3_N) of the power circuit, and the power circuit being powered by N positive and non-zero supply voltages, namely a lower supply voltage (VDD_1), an upper supply voltage (VDD_N), and (N−2) intermediate supply voltages (VDD_2) distributed between the lower (VDD_1) and upper (VDD_N) supply voltages.
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5.发明申请公开(公告)号：US20180131277A1
公开(公告)日：2018-05-10
申请号：US15577779
申请日：2016-05-26
申请人： WUPATEC
发明人： Emmanuel GATARD , Pierre LACHAUD
CPC分类号： H02M3/158 , H02M1/08 , H02M3/1588 , H03F1/0227 , H03F3/193 , H03F3/21 , H03F2200/102 , H03F2200/504 , H03K17/6871 , H03K2017/6875 , Y02B70/1466
摘要： Disclosed is a high-power and high-frequency DC-DC converter block for the envelope tracking technique including a step-down power circuit whose output constitutes the output of the DC-DC converter block, the step-down power circuit including at least one HEMT depletion-mode transistor, the DC-DC converter block further including a gate driving circuit of the at least one HEMT depletion-mode transistor of the step-down power circuit. The driving circuit has HEMT depletion-mode transistors configured to drive the gate of the at least one HEMT depletion-mode transistor of the step-down power circuit, and the step-down power circuit is powered by two positive and non-zero power supply voltages, namely a first power supply voltage and a second power supply voltage, the first power supply voltage being greater than the second power supply voltage.
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