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公开(公告)号：US11849186B1
公开(公告)日：2023-12-19
申请号：US17839628
申请日：2022-06-14
IPC分类号： H04N21/472 , H04N21/278 , H04N21/845
CPC分类号： H04N21/47217 , H04N21/278 , H04N21/8455
摘要： A data storage device and method for enabling metadata-based seek points for media access are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to identify a plurality of frames in video data that differ from surrounding frames by more than a threshold amount; store identifiers of the plurality of frames in the memory; and send the identifiers to the host to enable quick playback of the video data by the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
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公开(公告)号：US11010057B2
公开(公告)日：2021-05-18
申请号：US16425483
申请日：2019-05-29
摘要： A storage system, host, and method for storage system calibration are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to: determine a pattern of host writes to the memory; determine whether the pattern of host writes matches a granularity of a logical-to-physical address map used by the storage system; and in response to determining that the pattern of host writes does not match the granularity of the logical-to-physical address map used by the storage system, change the granularity of the logical-to-physical address map used by the storage system. In another embodiment, the storage system calibration is done by host directive. Other embodiments are provided.
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公开(公告)号：US10372603B2
公开(公告)日：2019-08-06
申请号：US15822881
申请日：2017-11-27
摘要： One or more control circuits of a storage system are configured to consolidate the sensing of pre-pad and/or post-pad data for one unaligned write command with the transferring of previously sensed pre-pad and/or post-pad data for another unaligned write command. By consolidating the sensing and transferring, considerable time is saved when programming data for a set of two or more unaligned write commands. Also, in one aspect, a single programming operation is performed for multiple unaligned write commands. Some conventional solutions may need to perform a programming operation for each unaligned write command. Hence, considerable programming time is saved by the storage system. Moreover, write amplification may be reduced by the storage system.
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4.发明授权公开(公告)号：US11775210B2
公开(公告)日：2023-10-03
申请号：US17177505
申请日：2021-02-17
发明人： Ramanathan Muthiah , Narendhiran Chinnaanangur Ravimohan , Balaji Thraksha Venkataramanan , Ramkumar Ramamurthy
IPC分类号： G06F3/06
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0673
摘要： A storage system and method for device-determined, application-specific dynamic command clustering are provided. In one embodiment, the storage system comprises a memory and a controller. The controller is configured to analyze commands received from a host to detect a pattern of a plurality of commands; inform the host of the pattern; receive, from the host, a single command comprising an identifier associated with the plurality of commands; and in response to receiving the single command from the host, executing the plurality of commands. Other embodiments are provided.
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公开(公告)号：US11681466B2
公开(公告)日：2023-06-20
申请号：US16917470
申请日：2020-06-30
CPC分类号： G06F3/0659 , G06F3/067 , G06F3/0611 , G06F3/0619 , G06F3/0644 , G06F3/0649 , G06F3/0653 , G06F3/0683
摘要： Example storage systems, storage devices, and methods provide proactive management of storage operations to, for example, beneficially minimize bottlenecking, latency, and other issues. An example system has a storage pool with a first storage device and a second storage device, and a processor configured to generate a storage request including a storage command, include a command processing time constraint in the storage request, send the storage request to the first storage device, and receive, from the first storage device, a proactive response including an estimation for an execution of the storage command by the first storage device based on the command processing time constraint. The processor may then select a fallback mechanism for executing the storage command based on the proactive response.
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公开(公告)号：US11030106B2
公开(公告)日：2021-06-08
申请号：US16444418
申请日：2019-06-18
IPC分类号： G06F12/08 , G06F12/0875 , G06F12/121 , G06F12/10
摘要： A storage system and method for enabling host-driven regional performance in memory are provided. In one embodiment, a method is provided comprising receiving a directive from a host device as to a preferred logical region of a non-volatile memory in a storage system; and based on the directive, modifying a caching policy specifying which pages of a logical-to-physical address map stored in the non-volatile memory are to be cached in a volatile memory of the storage system. Other embodiments are provided, such as modifying a garbage collection policy of the storage system based on information from the host device regarding a preferred logical region of the memory.
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公开(公告)号：US20200226064A1
公开(公告)日：2020-07-16
申请号：US16247977
申请日：2019-01-15
IPC分类号： G06F12/02 , G06F12/1036 , G06F12/06
摘要： A method for data consolidation in a memory system includes selecting a source block for data consolidation from a plurality of memory blocks in the memory system. The method further includes reading a physical-to-logical address mapping table associated with the source block to determine a first logical group in the source block. The method further includes loading a first logical-to-physical address mapping table associated with the first logical group. The method further includes identifying, using the first logical-to-physical address mapping table, valid memory fragments of the source block that are associated with the first logical group. The method further includes consolidating the identified valid memory fragments associated with the first logical group.
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公开(公告)号：US10331555B1
公开(公告)日：2019-06-25
申请号：US15913914
申请日：2018-03-06
摘要： Apparatus, systems, methods, and computer program products for dynamic memory compaction are disclosed. A memory device comprises a plurality of memory blocks and a controller for the memory device. A controller is configured to generate an input/output command to write a data chunk to a first memory block of a plurality of memory blocks. A controller is configured to compact an amount of valid data in a second memory block of a plurality of memory blocks based on a size of an I/O command.
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9.发明公开公开(公告)号：US20240256180A1
公开(公告)日：2024-08-01
申请号：US18223691
申请日：2023-07-19
IPC分类号： G06F3/06
CPC分类号： G06F3/0659 , G06F3/064 , G06F3/0607 , G06F3/0679
摘要： A data storage device and method for host-assisted deferred defragmentation and system handling are provided. In one embodiment, the data storage device comprises a memory and a controller. The controller is configured to receive, from a host, a plurality of write commands and a grouping identifier associated with the plurality of write commands, wherein the plurality of write commands comprise a plurality of non-sequential logical block addresses and a plurality of sequential segments of a file; and in response to the grouping identifier being associated with the plurality of write commands, execute the plurality of write commands by storing the plurality of sequential segments of the file sequentially in the memory even though the logical block addresses associated with the segments of the file are non-sequential. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
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公开(公告)号：US20220138545A1
公开(公告)日：2022-05-05
申请号：US17173843
申请日：2021-02-11
摘要： Various embodiments of this disclosure are directed to a mixed digital and analog domain approach to computational storage or memory applications. The mixed approach enables certain compute operations to be advantageously performed in the analog domain, achieving power saving. In some embodiments, an analog compute core is implemented based on a first set of memory elements that are made available with a second set of memory elements for digital data storage. A controller coupled to both sets of memory elements is able to selectively direct computational tasks to either the analog compute core or a digital processor coupled with the controller, based on one or more parameters including power, precision, and workload. In certain embodiments involving neural network tasks, the controller is configured to route certain tasks to the analog compute core based on neural network based factors such as network layer positioning and input signal type.
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