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    Structure and fabrication of field-effect transistor having source/drain extension defined by multiple local concentration maxima
    2.
    发明申请
    Structure and fabrication of field-effect transistor having source/drain extension defined by multiple local concentration maxima 审中-公开
    具有由多个局部浓度最大值定义的源/漏扩展的场效应晶体管的结构和制造

    公开(公告)号：US20100244151A1

    公开(公告)日：2010-09-30

    申请号：US12382974

    申请日：2009-03-27

    Applicant: William D. French ,  Constantin Bulucea

    Inventor： William D. French ,  Constantin Bulucea

    IPC: H01L29/78 ,  H01L21/336

    CPC classification number: H01L21/26513 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/28202 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66537 ,  H01L29/66659 ,  H01L29/7835

    Abstract: An insulated-gate field-effect transistor (100W) has a source (980) and a drain (242) laterally separated by a channel zone (244) of body material (180) of a semiconductor body. A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. A more heavily doped pocket portion (250) of the body material normally extends largely along only the source so that the IGFET is an asymmetric device. The source has a main source portion (980M) and a more lightly doped lateral source extension (980E). The semiconductor dopant which defines the source reaches multiple local concentration maxima in defining the source extension. The procedure involved in defining the source extension with semiconductor dopant that reaches two such local concentration maxima enables source/drain extensions of mutually different characteristics for three insulated-gate field-effect transistors to be defined in only two source/drain-extension doping operations.

    Abstract translation: 绝缘栅场效应晶体管（100W）具有由半导体主体的主体材料（180）的沟道区（244）横向隔开的源极（980）和漏极（242）。 栅电极（262）覆盖沟道区上方的栅介电层（260）。 主体材料的更重掺杂的袋部分（250）通常沿着源极大部分地延伸，使得IGFET是非对称的装置。 源极具有主源部分（980M）和更轻掺杂的侧向源延伸部（980E）。 限定源极的半导体掺杂剂在限定源延伸时达到多个局部最大浓度。 用半导体掺杂剂定义达到两个这样的局部浓度最大值的源极扩展所涉及的过程使得三个绝缘栅场效应晶体管的源极/漏极扩展能够仅在两个源极/漏极 - 扩展掺杂操作中被定义。

    Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants
    3.
    发明申请
    Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants 有权
    半导体结构的配置和制造，其中场效应晶体管的源极和漏极扩展由不同掺杂剂定义

    公开(公告)号：US20100244150A1

    公开(公告)日：2010-09-30

    申请号：US12382972

    申请日：2009-03-27

    Applicant: Sandeep R. Bahl ,  William D. French ,  Constantin Bulucea

    Inventor： Sandeep R. Bahl ,  William D. French ,  Constantin Bulucea

    IPC: H01L29/78 ,  H01L21/336

    CPC classification number: H01L29/7835 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/82285 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/167 ,  H01L29/6659 ,  H01L29/66659

    Abstract: An insulated-gate field-effect transistor (100) provided along an upper surface of a semiconductor body contains a pair of source/drain zones (240 and 242) laterally separated by a channel zone (244). A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. Each source/drain zone includes a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E) laterally continuous with the main portion and extending laterally under the gate electrode. The lateral extensions, which terminate the channel zone along the upper semiconductor surface, are respectively largely defined by a pair of semiconductor dopants of different atomic weights. With the transistor being an asymmetric device, the source/drain zones constitute a source and a drain. The lateral extension of the source is then more lightly doped than, and defined with dopant of higher atomic weight, than the lateral extension of the drain.

    Abstract translation: 沿着半导体主体的上表面设置的绝缘栅场效应晶体管（100）包含由沟道区（244）横向隔开的一对源极/漏极区（240和242）。 栅电极（262）覆盖沟道区上方的栅介电层（260）。 每个源极/漏极区域包括与主要部分横向连续并在栅电极下方横向延伸的主要部分（240M或242M）和更轻掺杂的侧向延伸部（240E或242E）。 沿着上半导体表面终止沟道区的横向延伸部分分别由不同原子量的一对半导体掺杂剂限定。 在晶体管是非对称器件的情况下，源极/漏极区域构成源极和漏极。 源极的横向延伸比起漏极的横向延伸稍微掺杂，并且由原子量较高的掺杂剂限定。

    Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants
    4.
    发明授权
    Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants 有权
    半导体结构的配置和制造，其中场效应晶体管的源极和漏极扩展由不同掺杂剂定义

    公开(公告)号：US08304320B2

    公开(公告)日：2012-11-06

    申请号：US13100192

    申请日：2011-05-03

    Applicant: Sandeep R. Bahl ,  William D. French ,  Constantin Bulucea

    Inventor： Sandeep R. Bahl ,  William D. French ,  Constantin Bulucea

    IPC: H01L21/336 ,  H01L21/8238

    CPC classification number: H01L29/7835 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/82285 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/167 ,  H01L29/6659 ,  H01L29/66659

    Abstract: An insulated-gate field-effect transistor (100) provided along an upper surface of a semiconductor body contains a pair of source/drain zones (240 and 242) laterally separated by a channel zone (244). A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. Each source/drain zone includes a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E) laterally continuous with the main portion and extending laterally under the gate electrode. The lateral extensions, which terminate the channel zone along the upper semiconductor surface, are respectively largely defined by a pair of semiconductor dopants of different atomic weights. With the transistor being an asymmetric device, the source/drain zones constitute a source and a drain. The lateral extension of the source is then more lightly doped than, and defined with dopant of higher atomic weight, than the lateral extension of the drain.

    Abstract translation: 沿着半导体主体的上表面设置的绝缘栅场效应晶体管（100）包含由沟道区（244）横向隔开的一对源极/漏极区（240和242）。 栅电极（262）覆盖沟道区上方的栅介电层（260）。 每个源极/漏极区域包括与主要部分横向连续并在栅电极下方横向延伸的主要部分（240M或242M）和更轻掺杂的侧向延伸部（240E或242E）。 沿着上半导体表面终止沟道区的横向延伸部分分别由不同原子量的一对半导体掺杂剂限定。 在晶体管是非对称器件的情况下，源极/漏极区域构成源极和漏极。 源极的横向延伸比起漏极的横向延伸稍微掺杂，并且由原子量较高的掺杂剂限定。

    Configuration and fabrication of semiconductor structure having extended-drain field-effect transistor
    5.
    发明申请
    Configuration and fabrication of semiconductor structure having extended-drain field-effect transistor 审中-公开
    具有扩展漏极场效应晶体管的半导体结构的配置和制造

    公开(公告)号：US20100244152A1

    公开(公告)日：2010-09-30

    申请号：US12382976

    申请日：2009-03-27

    Applicant: Sandeep R. Bahl ,  Constantin Bulucea ,  William D. French

    Inventor： Sandeep R. Bahl ,  Constantin Bulucea ,  William D. French

    IPC: H01L29/78 ,  H01L21/336

    CPC classification number: H01L21/26513 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/7835

    Abstract: An extended-drain insulated-gate field-effect transistor (104 or 106) contains first and second source/drain zones 324 and 184B or 364 and 186B) laterally separated by a channel (322 or 362) zone constituted by part of a first well region (184A or 186A). A gate dielectric layer (344 or 384) overlies the channel zone. A gate electrode (346 or 386) overlies the gate dielectric layer above the channel zone. The first source/drain zone is normally the source. The second S/D zone, normally the drain, is constituted with a second well region (184B or 186B). A well-separating portion 186A or 186B/212U) of the semiconductor body extends between the well regions and is more lightly doped than each well region. The configuration of the well regions cause the maximum electric field in the IGFET's portion of the semiconductor body to occur well below the upper semiconductor surface, typically at or close to where the well regions are closest to each other. The IGFET's operating characteristics are stable with operational time.

    Abstract translation: 扩展漏极绝缘栅场效应晶体管（104或106）包含由第一阱的一部分构成的沟道（322或362）区域横向隔开的第一和第二源/漏区324和184B或364和186B， 区域（184A或186A）。 栅极电介质层（344或384）覆盖在沟道区上。 栅电极（346或386）覆盖沟道区上方的栅介质层。 第一个源/漏区通常是源。 第二S / D区（通常为漏极）由第二阱区（184B或186B）构成。 半导体本体的阱分离部分186A或186B / 212U）在阱区之间延伸，并且比每个阱区域轻掺杂。 阱区域的配置导致半导体本体的IGFET的部分中的最大电场远低于上半导体表面，通常处于或接近阱区彼此最接近的位置。 IGFET的运行特性在运行时间稳定。

    Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket
    8.
    发明授权
    Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket 有权
    使用空穴与源极/漏极延伸部分或/和晕圈组合的场效应晶体管的结构和制造

    公开(公告)号：US08410549B2

    公开(公告)日：2013-04-02

    申请号：US12382968

    申请日：2009-03-27

    Applicant: Constantin Bulucea ,  Jeng-Jiun Yang ,  William D. French ,  Sandeep R. Bahl ,  D. Courtney Parker

    Inventor： Constantin Bulucea ,  Jeng-Jiun Yang ,  William D. French ,  Sandeep R. Bahl ,  D. Courtney Parker

    IPC: H01L29/66

    CPC classification number: H01L29/0847 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/7833 ,  H01L29/7835

    Abstract: Insulated-gate field-effect transistors (“IGFETs”), both symmetric and asymmetric, suitable for a semiconductor fabrication platform that provides IGFETs for analog and digital applications, including mixed-signal applications, utilize empty-well regions in achieving high performance. A relatively small amount of semiconductor well dopant is near the top of each empty well. Each IGFET (100, 102, 112, 114, 124, or 126) has a pair of source/drain zones laterally separated by a channel zone of body material of the empty well (180, 182, 192, 194, 204, or 206). A gate electrode overlies a gate dielectric layer above the channel zone. Each source/drain zone (240, 242, 280, 282, 520, 522, 550, 552, 720, 722, 752, or 752) has a main portion (240M, 242M, 280M, 282M, 520M, 522M, 550M, 552M, 720M, 722M, 752M, or 752M) and a more lightly doped lateral extension (240E, 242E, 280E, 282E, 520E, 522E, 550E, 552E, 720E, 722E, 752E, or 752E). Alternatively or additionally, a more heavily doped pocket portion (250 or 290) of the body material extends along one of the source/drain zones. When present, the pocket portion typically causes the IGFET to be an asymmetric device.

    Abstract translation: 对称和非对称的绝缘栅场效应晶体管（IGFET）适用于为模拟和数字应用（包括混合信号应用）提供IGFET的半导体制造平台，利用空井区域实现高性能。 相对少量的半导体阱掺杂剂在每个空的孔的顶部附近。 每个IGFET（100,102,112,114,124或126）具有由空井（180,182,192,194,204或206）的主体材料的通道区横向隔开的一对源/排出区 ）。 栅极电极覆盖在沟道区上方的栅极电介质层。 每个源/漏区（240,242,282,282,520,522,550,552,720,722,752或752）具有主要部分（240M，242M，280M，282M，520M，522M，550M， 552M，720M，722M，752M或752M）和更轻掺杂的侧向延伸部（240E，242E，280E，282E，520E，522E，550E，552E，720E，722E，752E或752E）。 替代地或另外地，主体材料的更加掺杂的凹穴部分（250或290）沿着源极/漏极区域中的一个延伸。 当存在时，口袋部分通常使IGFET成为非对称装置。

    Configuration and Fabrication of Semiconductor Structure in Which Source and Drain Extensions of Field-effect Transistor Are Defined with Different Dopants
    9.
    发明申请
    Configuration and Fabrication of Semiconductor Structure in Which Source and Drain Extensions of Field-effect Transistor Are Defined with Different Dopants 有权
    使用不同掺杂剂定义场效应晶体管的源极和漏极扩展的半导体结构的配置和制造

    公开(公告)号：US20120184077A1

    公开(公告)日：2012-07-19

    申请号：US13100192

    申请日：2011-05-03

    Applicant: Sandeep R. Bahl ,  William D. French ,  Constantin Bulucea

    Inventor： Sandeep R. Bahl ,  William D. French ,  Constantin Bulucea

    IPC: H01L21/336

    CPC classification number: H01L29/7835 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/82285 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/167 ,  H01L29/6659 ,  H01L29/66659

    Abstract: An insulated-gate field-effect transistor (100) provided along an upper surface of a semiconductor body contains a pair of source/drain zones (240 and 242) laterally separated by a channel zone (244). A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. Each source/drain zone includes a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E) laterally continuous with the main portion and extending laterally under the gate electrode. The lateral extensions, which terminate the channel zone along the upper semiconductor surface, are respectively largely defined by a pair of semiconductor dopants of different atomic weights. With the transistor being an asymmetric device, the source/drain zones constitute a source and a drain. The lateral extension of the source is then more lightly doped than, and defined with dopant of higher atomic weight, than the lateral extension of the drain.

    Abstract translation: 沿着半导体主体的上表面设置的绝缘栅场效应晶体管（100）包含由沟道区（244）横向隔开的一对源极/漏极区（240和242）。 栅电极（262）覆盖沟道区上方的栅介电层（260）。 每个源极/漏极区域包括主要部分（240M或242M）和与主要部分横向连续并在栅电极下方横向延伸的更轻掺杂的横向延伸部（240E或242E）。 沿着上半导体表面终止沟道区的横向延伸部分分别由不同原子量的一对半导体掺杂剂限定。 在晶体管是非对称器件的情况下，源极/漏极区域构成源极和漏极。 源极的横向延伸比起漏极的横向延伸稍微掺杂，并且由原子量较高的掺杂剂限定。

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