公开(公告)号：US10971508B2

公开(公告)日：2021-04-06

申请号：US16391326

申请日：2019-04-23

Applicant: Winbond Electronics Corp.

Inventor： Yao-Ting Tsai ,  Che-Fu Chuang ,  Jung-Ho Chang ,  Hsiu-Han Liao

IPC: H01L27/11531 ,  H01L27/11521 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3105 ,  H01L29/788 ,  H01L29/66 ,  H01L29/49 ,  H01L29/45 ,  H01L29/78

Abstract: Provided is an integrated circuit including a substrate, a plurality of first gate structures, a protective layer, a second gate structure, a source region, and a drain region. The substrate has a cell region and a peripheral region. The plurality of first gate structures are disposed in the cell region. A top surface and a sidewall of the plurality of first gate structures are covered by the protective layer. The second gate structure is disposed in the peripheral region. The source region and the drain region are disposed on the both side of the second gate structure. A manufacturing method of the integrated circuit is also provided.

公开(公告)号：US20200343256A1

公开(公告)日：2020-10-29

申请号：US16391326

申请日：2019-04-23

Applicant: Winbond Electronics Corp.

Inventor： Yao-Ting Tsai ,  Che-Fu Chuang ,  Jung-Ho Chang ,  Hsiu-Han Liao

IPC: H01L27/11531 ,  H01L27/11521 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3105 ,  H01L29/66 ,  H01L29/49 ,  H01L29/45 ,  H01L29/78 ,  H01L29/788

Abstract: Provided is an integrated circuit including a substrate, a plurality of first gate structures, a protective layer, a second gate structure, a source region, and a drain region. The substrate has a cell region and a peripheral region. The plurality of first gate structures are disposed in the cell region. A top surface and a sidewall of the plurality of first gate structures are covered by the protective layer. The second gate structure is disposed in the peripheral region. The source region and the drain region are disposed on the both side of the second gate structure. A manufacturing method of the integrated circuit is also provided.

公开(公告)号：US11251273B2

公开(公告)日：2022-02-15

申请号：US16521311

申请日：2019-07-24

Applicant: Winbond Electronics Corp.

Inventor： Jian-Ting Chen ,  Yao-Ting Tsai ,  Jung-Ho Chang ,  Hsiu-Han Liao

IPC: H01L21/28 ,  H01L27/11521 ,  H01L27/11531 ,  H01L29/423 ,  H01L29/66 ,  H01L21/3215 ,  H01L21/311 ,  H01L29/788 ,  H01L29/49

Abstract: A non-volatile memory device and its manufacturing method are provided. The method includes the following steps. A plurality of isolation structures are formed in a substrate. A first polycrystalline silicon layer is formed in the substrate and between two adjacent isolation structures. A first implantation process is performed to implant a first dopant into the first polycrystalline silicon layer and the isolation structures. A portion of each of the isolation structures is partially removed, and the remaining portion of each of the isolation structures has a substantially flat top surface. An annealing process is performed after partially removing the isolation structures to uniformly diffuse the first dopant in the first polycrystalline silicon layer. A dielectric layer is formed on the first polycrystalline silicon layer, and a second polycrystalline silicon layer is formed on the dielectric layer.