公开(公告)号：US07902006B2

公开(公告)日：2011-03-08

申请号：US12436356

申请日：2009-05-06

申请人： Woong-Kwon Kim ,  Ho-Jun Lee ,  Hong-Kee Chin ,  Sang-Heon Song ,  Jung-Suk Bang ,  Jun-Ho Song ,  Byeong-Jae Ahn ,  Bae-Heuk Yim

发明人： Woong-Kwon Kim ,  Ho-Jun Lee ,  Hong-Kee Chin ,  Sang-Heon Song ,  Jung-Suk Bang ,  Jun-Ho Song ,  Byeong-Jae Ahn ,  Bae-Heuk Yim

IPC分类号： H01L21/00 ,  H01L21/84 ,  G02F1/1343 ,  G02F1/1333

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1255

摘要： In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes.

摘要翻译： 在制造薄膜晶体管阵列基板时，在晶体管上形成钝化膜。 在钝化膜上形成第一光致抗蚀剂图案，其中第一部分部分地覆盖每个晶体管的至少一个源极/漏电极并且覆盖每个像素电极区域，并且具有比第一部分更厚的第二部分。 使用第一光致抗蚀剂图案作为掩模来图案化钝化膜。 去除第一光致抗蚀剂图案的第一部分以形成在像素电极区域周围向上突出的第二光致抗蚀剂图案。 透明导电膜在像素电极区域中形成有凹陷。 在每个像素电极区域中的透明膜上形成掩模图案，掩模图案的顶表面在透明膜的顶部之下。 使用掩模图案作为掩模来对透明膜进行图案化以形成像素电极。

公开(公告)号：US20100159652A1

公开(公告)日：2010-06-24

申请号：US12436356

申请日：2009-05-06

申请人： Woong-Kwon Kim ,  Ho-Jun Lee ,  Hong-Kee Chin ,  Sang-Heon Song ,  Jung-Suk Bank ,  Jun-Ho Song ,  Byeong-Jae Ahn ,  Bae-Heuk Yim

发明人： Woong-Kwon Kim ,  Ho-Jun Lee ,  Hong-Kee Chin ,  Sang-Heon Song ,  Jung-Suk Bank ,  Jun-Ho Song ,  Byeong-Jae Ahn ,  Bae-Heuk Yim

IPC分类号： H01L21/336

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1255

摘要： In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes.

摘要翻译： 在制造薄膜晶体管阵列基板时，在晶体管上形成钝化膜。 在钝化膜上形成第一光致抗蚀剂图案，其中第一部分部分地覆盖每个晶体管的至少一个源极/漏电极并且覆盖每个像素电极区域，并且具有比第一部分更厚的第二部分。 使用第一光致抗蚀剂图案作为掩模来图案化钝化膜。 去除第一光致抗蚀剂图案的第一部分以形成在像素电极区域周围向上突出的第二光致抗蚀剂图案。 透明导电膜在像素电极区域中形成有凹陷。 在每个像素电极区域中的透明膜上形成掩模图案，掩模图案的顶表面在透明膜的顶部之下。 使用掩模图案作为掩模来对透明膜进行图案化以形成像素电极。

公开(公告)号：US08450129B2

公开(公告)日：2013-05-28

申请号：US13231225

申请日：2011-09-13

申请人： Hong-Kee Chin ,  Sang-Gab Kim ,  Woong-Kwon Kim ,  Yong-Mo Choi ,  Seung-Ha Choi ,  Shin-Il Choi ,  Ho-Jun Lee ,  Jung-Suk Bang ,  Yu-Gwang Jeong

发明人： Hong-Kee Chin ,  Sang-Gab Kim ,  Woong-Kwon Kim ,  Yong-Mo Choi ,  Seung-Ha Choi ,  Shin-Il Choi ,  Ho-Jun Lee ,  Jung-Suk Bang ,  Yu-Gwang Jeong

IPC分类号： H01L33/16

CPC分类号： H01L27/12 ,  H01L27/1248 ,  H01L27/1288

摘要： A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

摘要翻译： 提供一种薄膜晶体管（TFT）基板，其中在接触部分中提供导电材料之间的足够大的接触面积以及制造TFT基板的方法。 TFT基板包括形成在绝缘基板上的栅极互连线，覆盖栅极互连线的栅极绝缘层，布置在栅极绝缘层上的半导体层，包括数据线，源极和漏极的数据互连线 形成在所述半导体层上，形成在所述数据互连线上并暴露所述漏电极的第一钝化层，形成在所述第一钝化膜上的第二钝化层和与所述漏电极电连接的像素电极。 第二钝化层的外侧壁位于第一钝化层的外侧壁的内侧。

公开(公告)号：US08044405B2

公开(公告)日：2011-10-25

申请号：US12429388

申请日：2009-04-24

申请人： Hong-Kee Chin ,  Sang-Gab Kim ,  Woong-Kwon Kim ,  Yong-Mo Choi ,  Seung-Ha Choi ,  Shin-Il Choi ,  Ho-Jun Lee ,  Jung-Suk Bang ,  Yu-Gwang Jeong

发明人： Hong-Kee Chin ,  Sang-Gab Kim ,  Woong-Kwon Kim ,  Yong-Mo Choi ,  Seung-Ha Choi ,  Shin-Il Choi ,  Ho-Jun Lee ,  Jung-Suk Bang ,  Yu-Gwang Jeong

IPC分类号： H01L29/12 ,  H01L21/336

CPC分类号： H01L27/12 ,  H01L27/1248 ,  H01L27/1288

摘要： A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

摘要翻译： 提供一种薄膜晶体管（TFT）基板，其中在接触部分中提供导电材料之间的足够大的接触面积以及制造TFT基板的方法。 TFT基板包括形成在绝缘基板上的栅极互连线，覆盖栅极互连线的栅极绝缘层，布置在栅极绝缘层上的半导体层，包括数据线，源极和漏极的数据互连线 形成在所述半导体层上，形成在所述数据互连线上并暴露所述漏电极的第一钝化层，形成在所述第一钝化膜上的第二钝化层和与所述漏电极电连接的像素电极。 第二钝化层的外侧壁位于第一钝化层的外侧壁的内侧。

公开(公告)号：US08901691B2

公开(公告)日：2014-12-02

申请号：US13243737

申请日：2011-09-23

申请人： Yun-Jong Yeo ,  Byeong-Hoon Cho ,  Ki-Hun Jeong ,  Hong-Kee Chin ,  Jung-Suk Bang ,  Woong-Kwon Kim ,  Sung-Ryul Kim ,  Hee-Joon Kim ,  Dae-Cheol Kim ,  Kun-Wook Han

发明人： Yun-Jong Yeo ,  Byeong-Hoon Cho ,  Ki-Hun Jeong ,  Hong-Kee Chin ,  Jung-Suk Bang ,  Woong-Kwon Kim ,  Sung-Ryul Kim ,  Hee-Joon Kim ,  Dae-Cheol Kim ,  Kun-Wook Han

IPC分类号： H01L27/32 ,  G06F3/042 ,  G06F3/041

CPC分类号： G06F3/0412 ,  G06F3/042 ,  G06F2203/04103

摘要： A touch sensing substrate includes a substrate, a first light sensing element, a second light sensing element and a first bias line. The first light sensing element includes a first gate electrode, a first active pattern overlapping with the first gate electrode, a first source electrode partially overlapping with the first active pattern and a first drain electrode partially overlapping with the first active pattern. The second light sensing element includes a second gate electrode, a second active pattern overlapping with the second gate electrode, a second source electrode partially overlapping with the second active pattern and a second drain electrode partially overlapping with the second active pattern. The first bias line is connected to the first and second gate electrodes.

摘要翻译： 触摸感测基板包括基板，第一光感测元件，第二光感测元件和第一偏置线。 第一感光元件包括第一栅电极，与第一栅电极重叠的第一有源图案，与第一有源图案部分重叠的第一源电极和与第一有源图案部分重叠的第一漏电极。 第二感光元件包括第二栅电极，与第二栅电极重叠的第二有源图案，与第二有源图案部分重叠的第二源电极和与第二有源图案部分重叠的第二漏电极。 第一偏置线连接到第一和第二栅电极。

公开(公告)号：US08796626B2

公开(公告)日：2014-08-05

申请号：US13194365

申请日：2011-07-29

申请人： Kun-Wook Han ,  Sung-Ryul Kim ,  Woong-Kwon Kim ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang ,  Yun-Jong Yeo ,  Byeong-Hoon Cho ,  Hong-Kee Chin ,  Sung-Jin Mun

发明人： Kun-Wook Han ,  Sung-Ryul Kim ,  Woong-Kwon Kim ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang ,  Yun-Jong Yeo ,  Byeong-Hoon Cho ,  Hong-Kee Chin ,  Sung-Jin Mun

IPC分类号： H01L27/14

CPC分类号： H01L27/14692 ,  H01L27/14665

摘要： An optical sensor includes a visible light sensor includes a visible light sensing transistor and an infrared light sensor includes an infrared light sensing transistor, wherein the visible light sensing transistor receives a first driving voltage through a first driving voltage line, the infrared light sensing transistor receives a second driving voltage through a second driving voltage line, and the visible light sensing transistor and the infrared light sensing transistor receive a reference voltage through a reference voltage line.

摘要翻译： 光学传感器包括可见光传感器，其包括可见光感测晶体管，红外光传感器包括红外光检测晶体管，其中可见光感测晶体管通过第一驱动电压线接收第一驱动电压，红外光检测晶体管接收 通过第二驱动电压线的第二驱动电压，并且可见光感测晶体管和红外光检测晶体管通过参考电压线接收参考电压。

公开(公告)号：US08698144B2

公开(公告)日：2014-04-15

申请号：US12731380

申请日：2010-03-25

申请人： Kyung-Sook Jeon ,  Kap-Soo Yoon ,  Woong-Kwon Kim ,  Sang-Youn Han ,  Jun-Ho Song ,  Sung-Hoon Yang ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang

发明人： Kyung-Sook Jeon ,  Kap-Soo Yoon ,  Woong-Kwon Kim ,  Sang-Youn Han ,  Jun-Ho Song ,  Sung-Hoon Yang ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang

IPC分类号： H01L33/00

CPC分类号： G02F1/13338 ,  G02F2001/13312 ,  G02F2203/11 ,  G06F3/0412 ,  G06F3/042

摘要： A display panel that includes: a substrate, a sensing transistor disposed on the substrate, and a readout transistor connected to the sensing transistor and transmitting a detecting signal is presented. The sensing transistor includes a semiconductor layer disposed on the upper substrate, a source electrode and a drain electrode disposed on the semiconductor layer, and a gate electrode overlapping the semiconductor layer on the source electrode and the drain electrode. Accordingly, in a display device and a manufacturing method thereof, an infrared sensing transistor, a visible light sensing transistor, and a readout transistor are simultaneously formed with a top gate structure such that the number of manufacturing processes and the manufacturing cost may be reduced.

摘要翻译： 一种显示面板，包括：衬底，设置在衬底上的感测晶体管，以及连接到感测晶体管并传输检测信号的读出晶体管。 感测晶体管包括设置在上基板上的半导体层，设置在半导体层上的源电极和漏电极以及与源电极和漏电极上的半导体层重叠的栅电极。 因此，在显示装置及其制造方法中，同时形成具有顶栅结构的红外感测晶体管，可见光感测晶体管和读出晶体管，从而可以减少制造工艺的数量和制造成本。

公开(公告)号：US20110012115A1

公开(公告)日：2011-01-20

申请号：US12731380

申请日：2010-03-25

申请人： Kyung-Sook Jeon ,  Kap-Soo Yoon ,  Woong-Kwon Kim ,  Sang-Youn Han ,  Jun-Ho Song ,  Sung-Hoon Yang ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang

发明人： Kyung-Sook Jeon ,  Kap-Soo Yoon ,  Woong-Kwon Kim ,  Sang-Youn Han ,  Jun-Ho Song ,  Sung-Hoon Yang ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang

IPC分类号： H01L33/00

CPC分类号： G02F1/13338 ,  G02F2001/13312 ,  G02F2203/11 ,  G06F3/0412 ,  G06F3/042

摘要： A display panel that includes: a substrate, a sensing transistor disposed on the substrate, and a readout transistor connected to the sensing transistor and transmitting a detecting signal is presented. The sensing transistor includes a semiconductor layer disposed on the upper substrate, a source electrode and a drain electrode disposed on the semiconductor layer, and a gate electrode overlapping the semiconductor layer on the source electrode and the drain electrode. Accordingly, in a display device and a manufacturing method thereof, an infrared sensing transistor, a visible light sensing transistor, and a readout transistor are simultaneously formed with a top gate structure such that the number of manufacturing processes and the manufacturing cost may be reduced.

摘要翻译： 一种显示面板，包括：衬底，设置在衬底上的感测晶体管，以及连接到感测晶体管并传输检测信号的读出晶体管。 感测晶体管包括设置在上基板上的半导体层，设置在半导体层上的源电极和漏电极以及与源电极和漏电极上的半导体层重叠的栅电极。 因此，在显示装置及其制造方法中，同时形成具有顶栅结构的红外感测晶体管，可见光感测晶体管和读出晶体管，从而可以减少制造工艺的数量和制造成本。

公开(公告)号：US07947985B2

公开(公告)日：2011-05-24

申请号：US12435773

申请日：2009-05-05

申请人： Dae-Cheol Kim ,  Woong-Kwon Kim ,  Sang-Youn Han ,  In-Woo Kim ,  Ho-Jun Lee ,  Byeong-Jae Ahn

发明人： Dae-Cheol Kim ,  Woong-Kwon Kim ,  Sang-Youn Han ,  In-Woo Kim ,  Ho-Jun Lee ,  Byeong-Jae Ahn

IPC分类号： H01L27/14

CPC分类号： G02F1/136213 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

摘要： A thin film transistor array substrate and its manufacturing method are disclosed. A thin film transistor (TFT) includes a gate electrode formed on a substrate, and source and drain electrodes formed on the gate electrode and separated from each other. A common line made of the same material as the gate electrode is formed on the substrate. A storage capacitor includes a storage electrode connected with a storage electrode line and a pixel electrode formed on the storage electrode. The storage electrode and the pixel electrode are formed by patterning a transparent conductive film, and accordingly, light can be transmitted through the region where the storage capacitor is formed to thus increase an aperture ratio.

摘要翻译： 公开了薄膜晶体管阵列基板及其制造方法。 薄膜晶体管（TFT）包括形成在基板上的栅极电极和形成在栅电极上并彼此分离的源极和漏极。 在基板上形成由与栅电极相同的材料构成的公共线。 存储电容器包括与存储电极线连接的存储电极和形成在存储电极上的像素电极。 存储电极和像素电极通过图案化透明导电膜而形成，因此可以通过形成存储电容器的区域透射光，从而增加开口率。

公开(公告)号：US09087750B2

公开(公告)日：2015-07-21

申请号：US12898839

申请日：2010-10-06

申请人： Woong-Kwon Kim ,  Jung-Suk Bang ,  Sung-Hoon Yang ,  Sang-Youn Han ,  Suk-Won Jung ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Kyung-Sook Jeon ,  Seung-Mi Seo ,  Kun-Wook Han ,  Mi-Seon Seo

发明人： Woong-Kwon Kim ,  Jung-Suk Bang ,  Sung-Hoon Yang ,  Sang-Youn Han ,  Suk-Won Jung ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Kyung-Sook Jeon ,  Seung-Mi Seo ,  Kun-Wook Han ,  Mi-Seon Seo

IPC分类号： G06F3/042 ,  H01L27/12 ,  G06F3/041

CPC分类号： H01L27/1251 ,  G06F3/0412 ,  G06F3/042 ,  H01L27/1222 ,  H01L27/1233

摘要： A touch screen substrate includes a base substrate, a first switching element and a first sensing element which senses infrared light. The first switching element includes a first switching gate electrode, a first active pattern disposed on the first switching gate electrode, a first switching source electrode disposed on the first active pattern and a first switching drain electrode disposed apart from the first switching source electrode. The first sensing element includes a first sensing drain electrode connected to the first switching source electrode, a first sensing source electrode disposed apart from the first sensing drain electrode, a second active pattern disposed below the first sensing drain electrode and the first sensing source electrode and including a first amorphous layer, a doped amorphous layer and a second amorphous layer, and a first sensing gate electrode disposed on the first sensing drain electrode and the first sensing source electrode.

摘要翻译： 触摸屏基板包括基底，第一开关元件和感测红外光的第一感测元件。 第一开关元件包括第一开关栅电极，设置在第一开关栅电极上的第一有源图案，设置在第一有源图案上的第一开关源极和与第一开关源电极分开设置的第一开关漏电极。 第一感测元件包括连接到第一开关源电极的第一感测漏电极，与第一感测漏电极分开设置的第一感测源电极，设置在第一感测漏电极和第一感测源电极下方的第二有源图案，以及 包括第一非晶层，掺杂非晶层和第二非晶层，以及设置在第一感测漏电极和第一感测源电极上的第一感测栅电极。