公开(公告)号：US11570045B2

公开(公告)日：2023-01-31

申请号：US16146128

申请日：2018-09-28

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  David James Riddoch

IPC: H04L12/24 ,  H04W88/18 ,  H04L12/801 ,  H04W80/02 ,  H04L41/0813 ,  H04L47/10

Abstract: A network interface device comprises a plurality of components configured to process a flow of data one after another. A control component is configured to provide one or more control messages in said flow, said one or more control message being provided to said plurality of components one after another such that a configuration of one or more of said components is changed.

公开(公告)号：US11245580B2

公开(公告)日：2022-02-08

申请号：US16146128

申请日：2018-09-28

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  David James Riddoch

IPC: H04L12/24 ,  H04W88/18 ,  H04L12/801 ,  H04W80/02

Abstract: A network interface device comprises a plurality of components configured to process a flow of data one after another. A control component is configured to provide one or more control messages in said flow, said one or more control message being provided to said plurality of components one after another such that a configuration of one or more of said components is changed.

公开(公告)号：US20210026689A1

公开(公告)日：2021-01-28

申请号：US17069642

申请日：2020-10-13

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  David James Riddoch

IPC: G06F9/48 ,  G06F12/0811 ,  G06F9/38 ,  G06F12/0842

Abstract: A network interface device has an input configured to receive data from a network. The data is for one of a plurality of different applications. The network interface device also has at least one processor configured to determine which of a plurality of available different caches in a host system the data is to be injected by accessing to a receive queue comprising at least one descriptor indicating a cache location in one of said plurality of caches to which data is to be injected, wherein said at least one descriptor, which indicates the cache location, has an effect on subsequent descriptors of said receive queue until a next descriptor indicates another cache location. The at least one processor is also configured to cause the data to be injected to the cache location in the host system.

公开(公告)号：US11824830B2

公开(公告)日：2023-11-21

申请号：US17246310

申请日：2021-04-30

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  Neil Turton ,  David James Riddoch ,  Dmitri Kitariev ,  Ripduman Sohan ,  Derek Edward Roberts

IPC: H04L29/06 ,  H04L9/40

CPC classification number: H04L63/0227 ,  H04L63/029

Abstract: A network interface device having a hardware module comprising a plurality of processing units. Each of the plurality of processing units is associated with its own at least one predefined operation. At a compile time, the hardware module is configured by arranging at least some of the plurality of processing units to perform their respective at least one operation with respect to a data packet in a certain order so as to perform a function with respect to that data packet. A compiler is provide to assign different processing stages to each processing unit. A controller is provided to switch between different processing circuitry on the fly so that one processing circuitry may be used whilst another is being compiled.

公开(公告)号：US11689648B2

公开(公告)日：2023-06-27

申请号：US17199202

申请日：2021-03-11

Applicant: XILINX, INC.

Inventor： Steven Leslie Pope ,  Derek Edward Roberts ,  Dmitri Kitariev ,  Neil Duncan Turton ,  David James Riddoch ,  Ripduman Sohan

IPC: G06F15/173 ,  H04L69/22 ,  H04L47/34 ,  H04L67/1097 ,  H04L69/326

CPC classification number: H04L69/22 ,  H04L47/34 ,  H04L67/1097 ,  H04L69/326

Abstract: A network interface device comprises an input configured to receive a storage response comprising a plurality of packets of data, one or more packets comprising a header part and data to be stored, the header part comprising a transport protocol header and a data storage application header. A first packet processor is configured to receive two or more of said plurality of packets and perform transport protocol processing of the received packets to provide transport protocol processed packets A second packet processor configured to receive the transport protocol processed packets from the first packet processor, to write the data to be stored of the received packets to memory and to provide the data storage application header and a pointer to a location in the memory to which the data has been written.

公开(公告)号：US11321150B2

公开(公告)日：2022-05-03

申请号：US16540760

申请日：2019-08-14

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  David James Riddoch ,  Kieran Mansley ,  Sian Cathryn James

IPC: G06F7/06 ,  G06F9/54 ,  H04L69/28 ,  H04L69/16 ,  H04L49/90

Abstract: A method and data processing system are provided. The data processing system comprises an application associated with a plurality of sockets and a sub-system for making data available to the application via the plurality of sockets. The sub-system is configured to provide in response to a request from the application: an indication of events that have occurred on one or more of the plurality of sockets; and an indication of an order in which the events should be processed.

公开(公告)号：US11210148B2

公开(公告)日：2021-12-28

申请号：US16600314

申请日：2019-10-11

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  Derek Edward Roberts ,  David James Riddoch ,  Greg Law ,  Steve Grantham ,  Matthew Slattery

IPC: G06F9/54 ,  G06F13/00 ,  H04L12/861 ,  H04L29/06 ,  H04L29/08 ,  G06F15/16 ,  H04L12/879 ,  G06F9/30 ,  G06F13/14

Abstract: A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.

公开(公告)号：US11119956B2

公开(公告)日：2021-09-14

申请号：US15633566

申请日：2017-06-26

Applicant: Xilinx, Inc.

Inventor： Steve Leslie Pope ,  David James Riddoch

IPC: G06F13/24 ,  G06F13/42 ,  G06F13/38

Abstract: A network interface device capable of communication with a data processing system supporting an operating system and at least one application, the network interface device supporting communication with the operating system by means of: two or more data channels, each data channel being individually addressable by the network interface device and being capable of carrying application-level data between the network interface device and the data processing device; and a control channel individually addressable by the network interface device and capable of carrying control data between the network interface device, the control data defining commands and the network interface being responsive to at least one command sent over the control channel to establish at least one additional data channel.

公开(公告)号：US10999246B2

公开(公告)日：2021-05-04

申请号：US16121366

申请日：2018-09-04

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  Derek Edward Roberts ,  David James Riddoch

IPC: G06F21/00 ,  H04L29/06 ,  G06Q40/04

Abstract: A logic device and method are provided for intercepting a data flow from a network source to a network destination. A data store holds a set of compliance rules and corresponding actions. A packet inspector is configured to inspect the intercepted data flow and identify from the data store a compliance rule associated with the inspected data flow. A packet filter is configured to, when the data flow is identified as being associated with a compliance rule, carry out an action with respect to the data flow corresponding to the compliance rule.

公开(公告)号：US10666777B2

公开(公告)日：2020-05-26

申请号：US16413413

申请日：2019-05-15

Applicant: Xilinx, Inc.

Inventor： Steven Leslie Pope ,  David James Riddoch ,  Kieran Mansley

IPC: H04L29/06 ,  H04L29/08 ,  H04L12/859

Abstract: A method of transmitting data for use at a data processing system and network interface device, the data processing system being coupled to a network by the network interface device, the method comprising: forming a message template in accordance with a predetermined set of network protocols, the message template including at least in part one or more protocol headers; forming an application layer message in one or more parts; updating the message template with the parts of the application layer message; processing the message template in accordance with the predetermined set of network protocols so as to complete the protocol headers; and causing the network interface device to transmit the completed message over the network.