公开(公告)号：US10714528B2

公开(公告)日：2020-07-14

申请号：US16178483

申请日：2018-11-01

Applicant: XINTEC INC.

Inventor： Hsin Kuan ,  Shih-Kuang Chen ,  Chin-Ching Huang ,  Chia-Ming Cheng

IPC: H01L27/146 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: A chip package includes a chip structure, a molding material, a conductive layer, a redistribution layer, and a passivation layer. The chip structure has a front surface, a rear surface, a sidewall, a sensing area, and a conductive pad. The molding material covers the rear surface and the sidewall. The conductive layer extends form the conductive pad to the molding material located on the sidewall. The redistribution layer extends form the molding material that is located on the rear surface to the molding material that is located on the sidewall. The redistribution layer is in electrical contact with an end of the conductive layer facing away from the conductive pad. The passivation layer is located on the molding material and the redistribution layer. The passivation layer has an opening, and a portion of the redistribution layer is located in the opening.

公开(公告)号：US09449897B2

公开(公告)日：2016-09-20

申请号：US14198542

申请日：2014-03-05

Applicant: XINTEC INC.

Inventor： Bai-Yao Lou ,  Shih-Kuang Chen ,  Sheng-Yuan Lee

IPC: H01L21/78 ,  H01L23/48 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/48 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate; a device region formed in the semiconductor substrate; at least a conducting pad disposed over a surface of the semiconductor substrate; a protection plate disposed over the surface of the semiconductor substrate; and a spacer layer disposed between the surface of the semiconductor substrate and the protection plate, wherein the protection plate and the spacer layer surround a cavity over the device region, the spacer layer has an outer side surface away from the cavity, and the outer side surface of the spacer layer is not a cutting surface.

Abstract translation: 本发明的实施例提供一种芯片封装，其包括：半导体衬底; 形成在所述半导体衬底中的器件区域; 至少一个设置在所述半导体衬底的表面上的导电焊盘; 设置在所述半导体衬底的表面上的保护板; 以及设置在所述半导体衬底的表面和所述保护板之间的间隔层，其中所述保护板和所述间隔层围绕所述器件区域的空腔，所述间隔层具有远离所述腔的外侧表面，并且所述外侧 间隔层的表面不是切割面。

公开(公告)号：US09023676B2

公开(公告)日：2015-05-05

申请号：US14166749

申请日：2014-01-28

Applicant: Xintec Inc.

Inventor： Chih-Hao Chen ,  Bai-Yao Lou ,  Shih-Kuang Chen

IPC: H01L21/00 ,  H01L27/146 ,  H01L21/20

CPC classification number: H01L27/14687 ,  H01L21/2007 ,  H01L27/14618 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wafer packaging method includes the following steps. A light transmissive carrier is provided. A hydrolytic temporary bonding layer is formed on the light transmissive carrier. A first surface of a light transmissive protection sheet is bonded to the hydrolytic temporary bonding layer, such that the hydrolytic temporary bonding layer is located between the light transmissive protection sheet and the light transmissive carrier. A second surface of the light transmissive protection sheet facing away from the first surface is bonded to a third surface of a wafer. The light transmissive carrier, the hydrolytic temporary bonding layer, the light transmissive protection sheet, and the wafer are immersed in a high temperature liquid, such that adhesion force of the hydrolytic temporary bonding layer is eliminated. The light transmissive protection sheet and the wafer are obtained from the high temperature liquid.

Abstract translation: 晶片封装方法包括以下步骤。 提供透光载体。 在透光性载体上形成水解性临时粘接层。 透光性保护片的第一表面与水解性临时粘合层接合，使得水解临时粘结层位于透光保护片和透光性载体之间。 透光保护片的背离第一表面的第二表面被结合到晶片的第三表面。 透光载体，水解临时粘合层，透光保护片和晶片浸入高温液体中，从而消除了水解临时粘合层的粘附力。 透光保护片和晶片是从高温液体中获得的。