公开(公告)号：US09864828B1

公开(公告)日：2018-01-09

申请号：US14857634

申请日：2015-09-17

Applicant: Xilinx, Inc.

Inventor： Susheel Kumar Puthana ,  Stephen P. Rozum ,  Sudipto Chakraborty ,  David A. Knol ,  Yong Li ,  Fernando J. Martinez Vallina ,  Sonal Santan ,  Nabeel Shirazi ,  Salil R. Raje ,  Ethan T. Parker ,  Suman Kumar Timmireddy ,  Heera Nand

IPC: G06F17/50

CPC classification number: G06F17/5077 ,  G06F17/5072

Abstract: Implementing hardware accelerators using programmable integrated circuits may include performing, using a processor, a design flow on a static circuit design. The static circuit design may specify a region reserved for a hardware accelerator and a static region comprising interface circuitry configured to couple the hardware accelerator with an external node. The design flow may generate an implemented static circuit design. Metadata describing the interface circuitry may be generated using a processor. A device support archive including the implemented static circuit design and the metadata may be written, using the processor, to a computer readable storage medium.