公开(公告)号：US11720735B2

公开(公告)日：2023-08-08

申请号：US17408218

申请日：2021-08-20

Applicant: Xilinx, Inc.

Inventor： Sebastian Turullols ,  Kyle Corbett ,  Sudipto Chakraborty ,  Siva Santosh Kumar Pyla ,  Ravinder Sharma ,  Kaustuv Manji ,  Jayaram Pvss ,  Stephen P. Rozum ,  Ch Vamshi Krishna ,  Susheel Puthana

IPC: G06F30/392 ,  G06F30/398 ,  G06F30/3953

CPC classification number: G06F30/392 ,  G06F30/398 ,  G06F30/3953

Abstract: Using a flat shell for an accelerator card includes reading a flat shell from one or more computer readable storage media using computer hardware, wherein the flat shell is a synthesized, unplaced, and unrouted top-level circuit design specifying platform circuitry. A kernel specifying user circuitry is synthesized using the computer hardware. The kernel is obtained from the one or more computer readable storage media. The synthesized kernel is linked, using the computer hardware, to the flat shell forming a unified circuit design. The unified circuit design is placed and routed, using the computer hardware, to generate a placed and routed circuit design specifying the platform circuitry and the user circuitry for implementation in an integrated circuit.

公开(公告)号：US20230055704A1

公开(公告)日：2023-02-23

申请号：US17408218

申请日：2021-08-20

Applicant: Xilinx, Inc.

Inventor： Sebastian Turullols ,  Kyle Corbett ,  Sudipto Chakraborty ,  Siva Santosh Kumar Pyla ,  Ravinder Sharma ,  Kaustuv Manji ,  Jayaram PVSS ,  Stephen P. Rozum ,  Ch Vamshi Krishna ,  Susheel Puthana

IPC: G06F30/392 ,  G06F30/3953 ,  G06F30/398

Abstract: Using a flat shell for an accelerator card includes reading a flat shell from one or more computer readable storage media using computer hardware, wherein the flat shell is a synthesized, unplaced, and unrouted top-level circuit design specifying platform circuitry. A kernel specifying user circuitry is synthesized using the computer hardware. The kernel is obtained from the one or more computer readable storage media. The synthesized kernel is linked, using the computer hardware, to the flat shell forming a unified circuit design. The unified circuit design is placed and routed, using the computer hardware, to generate a placed and routed circuit design specifying the platform circuitry and the user circuitry for implementation in an integrated circuit.